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Wed, 16 Feb 2022 05:25:22 -0800 (PST) Date: Wed, 16 Feb 2022 14:25:20 +0100 From: Thierry Reding To: Joerg Roedel , Will Deacon , Robin Murphy , Rob Herring Cc: Jon Hunter , iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 1/4] dt-bindings: arm-smmu: Document nvidia,memory-controller property Message-ID: References: <20211209163600.609613-1-thierry.reding@gmail.com> MIME-Version: 1.0 In-Reply-To: <20211209163600.609613-1-thierry.reding@gmail.com> User-Agent: Mutt/2.2 (7160e05a) (2022-02-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220216_052526_559640_E98D23E6 X-CRM114-Status: GOOD ( 18.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============5941888554487457747==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============5941888554487457747== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="QdP3IMTJOvZvvtKr" Content-Disposition: inline --QdP3IMTJOvZvvtKr Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Dec 09, 2021 at 05:35:57PM +0100, Thierry Reding wrote: > From: Thierry Reding >=20 > On NVIDIA SoC's the ARM SMMU needs to interact with the memory > controller in order to map memory clients to the corresponding stream > IDs. Document how the nvidia,memory-controller property can be used to > achieve this. >=20 > Note that this is a backwards-incompatible change that is, however, > necessary to ensure correctness. Without the new property, most of the > devices would still work but it is not guaranteed that all will. >=20 > Signed-off-by: Thierry Reding > --- > Changes in v2: > - clarify why the new nvidia,memory-controller property is required >=20 > .../devicetree/bindings/iommu/arm,smmu.yaml | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) Hi Joerg, can you pick up patches 1-3 of this series? DT bindings have been reviewed by Rob and Will acked the ARM SMMU change. I can take the device tree changes (patch 4) through the Tegra tree. Thanks, Thierry --QdP3IMTJOvZvvtKr Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmIM+z0ACgkQ3SOs138+ s6F+NhAAn5xDNKRoblN/jQS2iO8okgeQy7nLasXqGnUTnZOVo3uJjJTjlJTT3kLH WsOl1n6HoOfXuBigBlp6YAgCSaAnL22ALHz7rdseOKiZcVC5+sMzgv5y/yYS57r4 ay2xlSV0COLxnBwKkNapqijSL9iOxQP+UFxh75r2aAc+qA6qN8E35p8TfBj5NLUX P4Y4rqdFic4ZULsngj9hlAmlI9uTHs4ltF+/TigKA6cOwTB2cw3jQd9jstib63gY z07CvPs7GiaOlKl9gXXX6/0iOYtlE3C0GgO42YCgzMXM97F56nh+OOrZY4LOlIPS g8KAE27wGk4jjkjUgKYjiBNqsIKkvLSqqFg1ZqRaFDkiv6Z6oA7vQ4L78kOrrS1B g9O2lDNietS/scJXdteN8bqCRhEpqQYtiUEEMlEvRQV91QGb1iRoH78JlagzoKkR WnzFBe84yw/CJQ9DO3QIfg/Zaqn2aJOzOlsfxwlieKWCyBSmMC9yDMl4Hpb7imC1 f9MbklJ4ORiVyltemtOuFMCvSjgXDmVsOArrAJk+w/6WV+JsvYfLWU5Bm0+TVdtl I6eSy98XGI8ZQE8dzlGqiF1QZ2rytUE3zCwBz8zG/SiFKFfdWUaxUkB2jr46Izcb 6QSU5X4jaeKL2B69FROt6IoWoX+rPmvhRVrZqMmtfu9Aqc6JI3o= =7wVH -----END PGP SIGNATURE----- --QdP3IMTJOvZvvtKr-- --===============5941888554487457747== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============5941888554487457747==--