Re: [PATCH v2 8/9] arm64: dts: imx8mp: add GPU power domains

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	patchwork-lst@pengutronix.de
Subject: Re: [PATCH v2 8/9] arm64: dts: imx8mp: add GPU power domains
Date: Mon, 21 Feb 2022 13:34:18 +0200	[thread overview]
Message-ID: <YhN4urs6KS2m5NBC@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20220207192547.1997549-8-l.stach@pengutronix.de>

Hi Lucas,

Thank you for the patch.

On Mon, Feb 07, 2022 at 08:25:46PM +0100, Lucas Stach wrote:
> Add the power domains for the GPUs, which do not require any interaction with
> a blk-ctrl, but are simply two PU domains nested inside a MIX domain.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 27 +++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index dc488a147d0c..9ed57171b9fc 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -503,6 +503,33 @@ pgc_usb2_phy: power-domain@3 {
>  						reg = <IMX8MP_POWER_DOMAIN_USB2_PHY>;
>  					};
>  
> +					pgc_gpu2d: power-domain@6 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MP_POWER_DOMAIN_GPU2D>;
> +						clocks = <&clk IMX8MP_CLK_GPU2D_ROOT>;
> +						power-domains = <&pgc_gpumix>;
> +					};
> +
> +					pgc_gpumix: power-domain@7 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MP_POWER_DOMAIN_GPUMIX>;
> +						clocks = <&clk IMX8MP_CLK_GPU_ROOT>,
> +							 <&clk IMX8MP_CLK_GPU_AHB>;
> +						assigned-clocks = <&clk IMX8MP_CLK_GPU_AXI>,
> +								  <&clk IMX8MP_CLK_GPU_AHB>;
> +						assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
> +									 <&clk IMX8MP_SYS_PLL1_800M>;
> +						assigned-clock-rates = <800000000>, <400000000>;
> +					};
> +
> +					pgc_gpu3d: power-domain@9 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MP_POWER_DOMAIN_GPU3D>;
> +						clocks = <&clk IMX8MP_CLK_GPU3D_ROOT>,
> +							 <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;
> +						power-domains = <&pgc_gpumix>;
> +					};
> +
>  					pgc_hsiomix: power-domains@17 {
>  						#power-domain-cells = <0>;
>  						reg = <IMX8MP_POWER_DOMAIN_HSIOMIX>;
> 

-- 
Regards,

Laurent Pinchart

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