* [PATCH 1/4] dt-bindings: watchdog: Add compatible for MediaTek MT8186
2022-02-16 1:45 [0/4] Add watchdog support for MT8186 SoC Rex-BC Chen
@ 2022-02-16 1:45 ` Rex-BC Chen
2022-02-25 16:24 ` Rob Herring
2022-02-25 16:36 ` Guenter Roeck
2022-02-16 1:45 ` [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file Rex-BC Chen
` (2 subsequent siblings)
3 siblings, 2 replies; 13+ messages in thread
From: Rex-BC Chen @ 2022-02-16 1:45 UTC (permalink / raw)
To: wim, linux, matthias.bgg, robh+dt, p.zabel
Cc: runyang.chen, linux-watchdog, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group, Rex-BC Chen
Add dt-binding documentation of watchdog for MediaTek MT8186 SoC.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
index 0114871f887a..74db01e3658b 100644
--- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
@@ -15,6 +15,7 @@ Required properties:
"mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629
"mediatek,mt7986-wdt", "mediatek,mt6589-wdt": for MT7986
"mediatek,mt8183-wdt": for MT8183
+ "mediatek,mt8186-wdt", "mediatek,mt6589-wdt": for MT8186
"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
"mediatek,mt8192-wdt": for MT8192
"mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195
--
2.18.0
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH 1/4] dt-bindings: watchdog: Add compatible for MediaTek MT8186
2022-02-16 1:45 ` [PATCH 1/4] dt-bindings: watchdog: Add compatible for MediaTek MT8186 Rex-BC Chen
@ 2022-02-25 16:24 ` Rob Herring
2022-02-25 16:36 ` Guenter Roeck
1 sibling, 0 replies; 13+ messages in thread
From: Rob Herring @ 2022-02-25 16:24 UTC (permalink / raw)
To: Rex-BC Chen
Cc: devicetree, linux-watchdog, linux-arm-kernel,
Project_Global_Chrome_Upstream_Group, p.zabel, linux-kernel,
linux, linux-mediatek, runyang.chen, matthias.bgg, robh+dt, wim
On Wed, 16 Feb 2022 09:45:02 +0800, Rex-BC Chen wrote:
> Add dt-binding documentation of watchdog for MediaTek MT8186 SoC.
>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/4] dt-bindings: watchdog: Add compatible for MediaTek MT8186
2022-02-16 1:45 ` [PATCH 1/4] dt-bindings: watchdog: Add compatible for MediaTek MT8186 Rex-BC Chen
2022-02-25 16:24 ` Rob Herring
@ 2022-02-25 16:36 ` Guenter Roeck
1 sibling, 0 replies; 13+ messages in thread
From: Guenter Roeck @ 2022-02-25 16:36 UTC (permalink / raw)
To: Rex-BC Chen, wim, matthias.bgg, robh+dt, p.zabel
Cc: runyang.chen, linux-watchdog, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group
On 2/15/22 17:45, Rex-BC Chen wrote:
> Add dt-binding documentation of watchdog for MediaTek MT8186 SoC.
>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> index 0114871f887a..74db01e3658b 100644
> --- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> +++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> @@ -15,6 +15,7 @@ Required properties:
> "mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629
> "mediatek,mt7986-wdt", "mediatek,mt6589-wdt": for MT7986
> "mediatek,mt8183-wdt": for MT8183
> + "mediatek,mt8186-wdt", "mediatek,mt6589-wdt": for MT8186
> "mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
> "mediatek,mt8192-wdt": for MT8192
> "mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file
2022-02-16 1:45 [0/4] Add watchdog support for MT8186 SoC Rex-BC Chen
2022-02-16 1:45 ` [PATCH 1/4] dt-bindings: watchdog: Add compatible for MediaTek MT8186 Rex-BC Chen
@ 2022-02-16 1:45 ` Rex-BC Chen
2022-02-25 16:25 ` Rob Herring
2022-02-25 16:37 ` Guenter Roeck
2022-02-16 1:45 ` [3/4] dt-bindings: reset: mt8186: add DSI reset bit for MMSYS Rex-BC Chen
2022-02-16 1:45 ` [4/4] watchdog: mediatek: mt8186: add wdt support Rex-BC Chen
3 siblings, 2 replies; 13+ messages in thread
From: Rex-BC Chen @ 2022-02-16 1:45 UTC (permalink / raw)
To: wim, linux, matthias.bgg, robh+dt, p.zabel
Cc: runyang.chen, linux-watchdog, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group, Rex-BC Chen
From: Runyang Chen <runyang.chen@mediatek.com>
Add toprgu reset-controller header file for MT8186.
Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
include/dt-bindings/reset/mt8186-resets.h | 33 +++++++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 include/dt-bindings/reset/mt8186-resets.h
diff --git a/include/dt-bindings/reset/mt8186-resets.h b/include/dt-bindings/reset/mt8186-resets.h
new file mode 100644
index 000000000000..36e5764e2e6c
--- /dev/null
+++ b/include/dt-bindings/reset/mt8186-resets.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Runyang Chen <runyang.chen@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8186
+
+#define MT8186_TOPRGU_INFRA_SW_RST 0
+#define MT8186_TOPRGU_MM_SW_RST 1
+#define MT8186_TOPRGU_MFG_SW_RST 2
+#define MT8186_TOPRGU_VENC_SW_RST 3
+#define MT8186_TOPRGU_VDEC_SW_RST 4
+#define MT8186_TOPRGU_IMG_SW_RST 5
+#define MT8186_TOPRGU_DDR_SW_RST 6
+#define MT8186_TOPRGU_INFRA_AO_SW_RST 8
+#define MT8186_TOPRGU_CONNSYS_SW_RST 9
+#define MT8186_TOPRGU_APMIXED_SW_RST 10
+#define MT8186_TOPRGU_PWRAP_SW_RST 11
+#define MT8186_TOPRGU_CONN_MCU_SW_RST 12
+#define MT8186_TOPRGU_IPNNA_SW_RST 13
+#define MT8186_TOPRGU_WPE_SW_RST 14
+#define MT8186_TOPRGU_ADSP_SW_RST 15
+#define MT8186_TOPRGU_AUDIO_SW_RST 17
+#define MT8186_TOPRGU_CAM_MAIN_SW_RST 18
+#define MT8186_TOPRGU_CAM_RAWA_SW_RST 19
+#define MT8186_TOPRGU_CAM_RAWB_SW_RST 20
+#define MT8186_TOPRGU_IPE_SW_RST 21
+#define MT8186_TOPRGU_IMG2_SW_RST 22
+#define MT8186_TOPRGU_SW_RST_NUM 23
+
+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
--
2.18.0
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^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file
2022-02-16 1:45 ` [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file Rex-BC Chen
@ 2022-02-25 16:25 ` Rob Herring
2022-02-25 16:37 ` Guenter Roeck
1 sibling, 0 replies; 13+ messages in thread
From: Rob Herring @ 2022-02-25 16:25 UTC (permalink / raw)
To: Rex-BC Chen
Cc: matthias.bgg, robh+dt, linux-watchdog, linux-arm-kernel,
runyang.chen, wim, linux, linux-mediatek, linux-kernel, p.zabel,
Project_Global_Chrome_Upstream_Group, devicetree
On Wed, 16 Feb 2022 09:45:03 +0800, Rex-BC Chen wrote:
> From: Runyang Chen <runyang.chen@mediatek.com>
>
> Add toprgu reset-controller header file for MT8186.
>
> Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> include/dt-bindings/reset/mt8186-resets.h | 33 +++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
> create mode 100644 include/dt-bindings/reset/mt8186-resets.h
>
Acked-by: Rob Herring <robh@kernel.org>
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file
2022-02-16 1:45 ` [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file Rex-BC Chen
2022-02-25 16:25 ` Rob Herring
@ 2022-02-25 16:37 ` Guenter Roeck
2022-03-01 2:56 ` Rex-BC Chen
1 sibling, 1 reply; 13+ messages in thread
From: Guenter Roeck @ 2022-02-25 16:37 UTC (permalink / raw)
To: Rex-BC Chen, wim, matthias.bgg, robh+dt, p.zabel
Cc: runyang.chen, linux-watchdog, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group
On 2/15/22 17:45, Rex-BC Chen wrote:
> From: Runyang Chen <runyang.chen@mediatek.com>
>
> Add toprgu reset-controller header file for MT8186.
>
> Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
With the next patch squashed into this one:
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> include/dt-bindings/reset/mt8186-resets.h | 33 +++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
> create mode 100644 include/dt-bindings/reset/mt8186-resets.h
>
> diff --git a/include/dt-bindings/reset/mt8186-resets.h b/include/dt-bindings/reset/mt8186-resets.h
> new file mode 100644
> index 000000000000..36e5764e2e6c
> --- /dev/null
> +++ b/include/dt-bindings/reset/mt8186-resets.h
> @@ -0,0 +1,33 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
> +/*
> + * Copyright (c) 2022 MediaTek Inc.
> + * Author: Runyang Chen <runyang.chen@mediatek.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8186
> +
> +#define MT8186_TOPRGU_INFRA_SW_RST 0
> +#define MT8186_TOPRGU_MM_SW_RST 1
> +#define MT8186_TOPRGU_MFG_SW_RST 2
> +#define MT8186_TOPRGU_VENC_SW_RST 3
> +#define MT8186_TOPRGU_VDEC_SW_RST 4
> +#define MT8186_TOPRGU_IMG_SW_RST 5
> +#define MT8186_TOPRGU_DDR_SW_RST 6
> +#define MT8186_TOPRGU_INFRA_AO_SW_RST 8
> +#define MT8186_TOPRGU_CONNSYS_SW_RST 9
> +#define MT8186_TOPRGU_APMIXED_SW_RST 10
> +#define MT8186_TOPRGU_PWRAP_SW_RST 11
> +#define MT8186_TOPRGU_CONN_MCU_SW_RST 12
> +#define MT8186_TOPRGU_IPNNA_SW_RST 13
> +#define MT8186_TOPRGU_WPE_SW_RST 14
> +#define MT8186_TOPRGU_ADSP_SW_RST 15
> +#define MT8186_TOPRGU_AUDIO_SW_RST 17
> +#define MT8186_TOPRGU_CAM_MAIN_SW_RST 18
> +#define MT8186_TOPRGU_CAM_RAWA_SW_RST 19
> +#define MT8186_TOPRGU_CAM_RAWB_SW_RST 20
> +#define MT8186_TOPRGU_IPE_SW_RST 21
> +#define MT8186_TOPRGU_IMG2_SW_RST 22
> +#define MT8186_TOPRGU_SW_RST_NUM 23
> +
> +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file
2022-02-25 16:37 ` Guenter Roeck
@ 2022-03-01 2:56 ` Rex-BC Chen
0 siblings, 0 replies; 13+ messages in thread
From: Rex-BC Chen @ 2022-03-01 2:56 UTC (permalink / raw)
To: Guenter Roeck, wim, matthias.bgg, robh+dt, p.zabel
Cc: runyang.chen, linux-watchdog, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group
Hello Guenter,
Thanks for your review.
I will do this in next version.
BRs,
Rex
On Fri, 2022-02-25 at 08:37 -0800, Guenter Roeck wrote:
> On 2/15/22 17:45, Rex-BC Chen wrote:
> > From: Runyang Chen <runyang.chen@mediatek.com>
> >
> > Add toprgu reset-controller header file for MT8186.
> >
> > Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
> > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
>
> With the next patch squashed into this one:
>
> Reviewed-by: Guenter Roeck <linux@roeck-us.net>
>
> > ---
> > include/dt-bindings/reset/mt8186-resets.h | 33
> > +++++++++++++++++++++++
> > 1 file changed, 33 insertions(+)
> > create mode 100644 include/dt-bindings/reset/mt8186-resets.h
> >
> > diff --git a/include/dt-bindings/reset/mt8186-resets.h
> > b/include/dt-bindings/reset/mt8186-resets.h
> > new file mode 100644
> > index 000000000000..36e5764e2e6c
> > --- /dev/null
> > +++ b/include/dt-bindings/reset/mt8186-resets.h
> > @@ -0,0 +1,33 @@
> > +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
> > +/*
> > + * Copyright (c) 2022 MediaTek Inc.
> > + * Author: Runyang Chen <runyang.chen@mediatek.com>
> > + */
> > +
> > +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186
> > +#define _DT_BINDINGS_RESET_CONTROLLER_MT8186
> > +
> > +#define MT8186_TOPRGU_INFRA_SW_RST 0
> > +#define MT8186_TOPRGU_MM_SW_RST
> > 1
> > +#define MT8186_TOPRGU_MFG_SW_RST 2
> > +#define MT8186_TOPRGU_VENC_SW_RST 3
> > +#define MT8186_TOPRGU_VDEC_SW_RST 4
> > +#define MT8186_TOPRGU_IMG_SW_RST 5
> > +#define MT8186_TOPRGU_DDR_SW_RST 6
> > +#define MT8186_TOPRGU_INFRA_AO_SW_RST
> > 8
> > +#define MT8186_TOPRGU_CONNSYS_SW_RST
> > 9
> > +#define MT8186_TOPRGU_APMIXED_SW_RST
> > 10
> > +#define MT8186_TOPRGU_PWRAP_SW_RST 11
> > +#define MT8186_TOPRGU_CONN_MCU_SW_RST
> > 12
> > +#define MT8186_TOPRGU_IPNNA_SW_RST 13
> > +#define MT8186_TOPRGU_WPE_SW_RST 14
> > +#define MT8186_TOPRGU_ADSP_SW_RST 15
> > +#define MT8186_TOPRGU_AUDIO_SW_RST 17
> > +#define MT8186_TOPRGU_CAM_MAIN_SW_RST
> > 18
> > +#define MT8186_TOPRGU_CAM_RAWA_SW_RST
> > 19
> > +#define MT8186_TOPRGU_CAM_RAWB_SW_RST
> > 20
> > +#define MT8186_TOPRGU_IPE_SW_RST 21
> > +#define MT8186_TOPRGU_IMG2_SW_RST 22
> > +#define MT8186_TOPRGU_SW_RST_NUM 23
> > +
> > +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
>
>
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [3/4] dt-bindings: reset: mt8186: add DSI reset bit for MMSYS
2022-02-16 1:45 [0/4] Add watchdog support for MT8186 SoC Rex-BC Chen
2022-02-16 1:45 ` [PATCH 1/4] dt-bindings: watchdog: Add compatible for MediaTek MT8186 Rex-BC Chen
2022-02-16 1:45 ` [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file Rex-BC Chen
@ 2022-02-16 1:45 ` Rex-BC Chen
2022-02-25 16:26 ` Rob Herring
2022-02-16 1:45 ` [4/4] watchdog: mediatek: mt8186: add wdt support Rex-BC Chen
3 siblings, 1 reply; 13+ messages in thread
From: Rex-BC Chen @ 2022-02-16 1:45 UTC (permalink / raw)
To: wim, linux, matthias.bgg, robh+dt, p.zabel
Cc: runyang.chen, linux-watchdog, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group, Rex-BC Chen
Add DSI software reset bit which is controlled by MMSYS for MT8186.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
include/dt-bindings/reset/mt8186-resets.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/dt-bindings/reset/mt8186-resets.h b/include/dt-bindings/reset/mt8186-resets.h
index 36e5764e2e6c..5f850370c42c 100644
--- a/include/dt-bindings/reset/mt8186-resets.h
+++ b/include/dt-bindings/reset/mt8186-resets.h
@@ -30,4 +30,7 @@
#define MT8186_TOPRGU_IMG2_SW_RST 22
#define MT8186_TOPRGU_SW_RST_NUM 23
+/* MMSYS resets */
+#define MT8186_MMSYS_SW0_RST_B_DISP_DSI0 19
+
#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
--
2.18.0
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^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [3/4] dt-bindings: reset: mt8186: add DSI reset bit for MMSYS
2022-02-16 1:45 ` [3/4] dt-bindings: reset: mt8186: add DSI reset bit for MMSYS Rex-BC Chen
@ 2022-02-25 16:26 ` Rob Herring
2022-03-01 2:54 ` Rex-BC Chen
0 siblings, 1 reply; 13+ messages in thread
From: Rob Herring @ 2022-02-25 16:26 UTC (permalink / raw)
To: Rex-BC Chen
Cc: wim, linux, matthias.bgg, p.zabel, runyang.chen, linux-watchdog,
devicetree, linux-arm-kernel, linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group
On Wed, Feb 16, 2022 at 09:45:04AM +0800, Rex-BC Chen wrote:
> Add DSI software reset bit which is controlled by MMSYS for MT8186.
>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> include/dt-bindings/reset/mt8186-resets.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/include/dt-bindings/reset/mt8186-resets.h b/include/dt-bindings/reset/mt8186-resets.h
> index 36e5764e2e6c..5f850370c42c 100644
> --- a/include/dt-bindings/reset/mt8186-resets.h
> +++ b/include/dt-bindings/reset/mt8186-resets.h
> @@ -30,4 +30,7 @@
> #define MT8186_TOPRGU_IMG2_SW_RST 22
> #define MT8186_TOPRGU_SW_RST_NUM 23
>
> +/* MMSYS resets */
> +#define MT8186_MMSYS_SW0_RST_B_DISP_DSI0 19
This can just be squashed into the previous patch.
> +
> #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
> --
> 2.18.0
>
>
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [3/4] dt-bindings: reset: mt8186: add DSI reset bit for MMSYS
2022-02-25 16:26 ` Rob Herring
@ 2022-03-01 2:54 ` Rex-BC Chen
0 siblings, 0 replies; 13+ messages in thread
From: Rex-BC Chen @ 2022-03-01 2:54 UTC (permalink / raw)
To: Rob Herring
Cc: wim, linux, matthias.bgg, p.zabel, runyang.chen, linux-watchdog,
devicetree, linux-arm-kernel, linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group
Hello Rob,
Thanks for your review.
I will do this in next version.
BRs,
Rex
On Fri, 2022-02-25 at 10:26 -0600, Rob Herring wrote:
> On Wed, Feb 16, 2022 at 09:45:04AM +0800, Rex-BC Chen wrote:
> > Add DSI software reset bit which is controlled by MMSYS for MT8186.
> >
> > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> > ---
> > include/dt-bindings/reset/mt8186-resets.h | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/include/dt-bindings/reset/mt8186-resets.h
> > b/include/dt-bindings/reset/mt8186-resets.h
> > index 36e5764e2e6c..5f850370c42c 100644
> > --- a/include/dt-bindings/reset/mt8186-resets.h
> > +++ b/include/dt-bindings/reset/mt8186-resets.h
> > @@ -30,4 +30,7 @@
> > #define MT8186_TOPRGU_IMG2_SW_RST 22
> > #define MT8186_TOPRGU_SW_RST_NUM 23
> >
> > +/* MMSYS resets */
> > +#define MT8186_MMSYS_SW0_RST_B_DISP_DSI0 19
>
> This can just be squashed into the previous patch.
>
> > +
> > #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
> > --
> > 2.18.0
> >
> >
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [4/4] watchdog: mediatek: mt8186: add wdt support
2022-02-16 1:45 [0/4] Add watchdog support for MT8186 SoC Rex-BC Chen
` (2 preceding siblings ...)
2022-02-16 1:45 ` [3/4] dt-bindings: reset: mt8186: add DSI reset bit for MMSYS Rex-BC Chen
@ 2022-02-16 1:45 ` Rex-BC Chen
2022-02-25 16:36 ` Guenter Roeck
3 siblings, 1 reply; 13+ messages in thread
From: Rex-BC Chen @ 2022-02-16 1:45 UTC (permalink / raw)
To: wim, linux, matthias.bgg, robh+dt, p.zabel
Cc: runyang.chen, linux-watchdog, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group, Rex-BC Chen
From: Runyang Chen <runyang.chen@mediatek.com>
Support MT8186 watchdog device.
Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
drivers/watchdog/mtk_wdt.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 4577a76dd464..fe5a2ecba97a 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -11,6 +11,7 @@
#include <dt-bindings/reset/mt2712-resets.h>
#include <dt-bindings/reset/mt8183-resets.h>
+#include <dt-bindings/reset/mt8186-resets.h>
#include <dt-bindings/reset/mt8192-resets.h>
#include <dt-bindings/reset/mt8195-resets.h>
#include <linux/delay.h>
@@ -80,6 +81,10 @@ static const struct mtk_wdt_data mt8183_data = {
.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
};
+static const struct mtk_wdt_data mt8186_data = {
+ .toprgu_sw_rst_num = MT8186_TOPRGU_SW_RST_NUM,
+};
+
static const struct mtk_wdt_data mt8192_data = {
.toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
};
@@ -419,6 +424,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
{ .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
{ .compatible = "mediatek,mt6589-wdt" },
{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
+ { .compatible = "mediatek,mt8186-wdt", .data = &mt8186_data },
{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
{ .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
{ /* sentinel */ }
--
2.18.0
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^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [4/4] watchdog: mediatek: mt8186: add wdt support
2022-02-16 1:45 ` [4/4] watchdog: mediatek: mt8186: add wdt support Rex-BC Chen
@ 2022-02-25 16:36 ` Guenter Roeck
0 siblings, 0 replies; 13+ messages in thread
From: Guenter Roeck @ 2022-02-25 16:36 UTC (permalink / raw)
To: Rex-BC Chen, wim, matthias.bgg, robh+dt, p.zabel
Cc: runyang.chen, linux-watchdog, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group
On 2/15/22 17:45, Rex-BC Chen wrote:
> From: Runyang Chen <runyang.chen@mediatek.com>
>
> Support MT8186 watchdog device.
>
> Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> drivers/watchdog/mtk_wdt.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index 4577a76dd464..fe5a2ecba97a 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -11,6 +11,7 @@
>
> #include <dt-bindings/reset/mt2712-resets.h>
> #include <dt-bindings/reset/mt8183-resets.h>
> +#include <dt-bindings/reset/mt8186-resets.h>
> #include <dt-bindings/reset/mt8192-resets.h>
> #include <dt-bindings/reset/mt8195-resets.h>
> #include <linux/delay.h>
> @@ -80,6 +81,10 @@ static const struct mtk_wdt_data mt8183_data = {
> .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
> };
>
> +static const struct mtk_wdt_data mt8186_data = {
> + .toprgu_sw_rst_num = MT8186_TOPRGU_SW_RST_NUM,
> +};
> +
> static const struct mtk_wdt_data mt8192_data = {
> .toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
> };
> @@ -419,6 +424,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
> { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
> { .compatible = "mediatek,mt6589-wdt" },
> { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
> + { .compatible = "mediatek,mt8186-wdt", .data = &mt8186_data },
> { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
> { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
> { /* sentinel */ }
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^ permalink raw reply [flat|nested] 13+ messages in thread