From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Evgenii Stepanov <eugenis@google.com>,
Peter Collingbourne <pcc@google.com>,
Joey Gouly <joey.gouly@arm.com>,
Branislav Rankov <branislav.rankov@arm.com>
Subject: Re: [PATCH] arm64/mte: Remove asymmetric mode from the prctl() interface
Date: Tue, 8 Mar 2022 18:40:17 +0000 [thread overview]
Message-ID: <YiejEdy2u2D0iYbI@arm.com> (raw)
In-Reply-To: <20220308142230.3138843-1-broonie@kernel.org>
On Tue, Mar 08, 2022 at 02:22:30PM +0000, Mark Brown wrote:
> diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c
> index fb777d8fea32..2b35b706a7ba 100644
> --- a/arch/arm64/kernel/mte.c
> +++ b/arch/arm64/kernel/mte.c
> @@ -308,7 +308,16 @@ long set_mte_ctrl(struct task_struct *task, unsigned long arg)
> mte_ctrl |= MTE_CTRL_TCF_ASYNC;
> if (arg & PR_MTE_TCF_SYNC)
> mte_ctrl |= MTE_CTRL_TCF_SYNC;
> - if (arg & PR_MTE_TCF_ASYMM)
> +
> + /*
> + * If the system supports it and both sync and async modes are
> + * specified then implicitly enable asymmetric mode.
> + * Userspace could see a mix of both sync and async anyway due
> + * to differing or changing defaults on CPUs.
> + */
Exactly, so it can't be confusing for an application.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
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next prev parent reply other threads:[~2022-03-08 18:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-08 14:22 [PATCH] arm64/mte: Remove asymmetric mode from the prctl() interface Mark Brown
2022-03-08 18:40 ` Catalin Marinas [this message]
2022-03-08 21:58 ` Evgenii Stepanov
2022-03-09 12:35 ` Will Deacon
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