From: Oliver Upton <oupton@google.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
kvmarm@lists.cs.columbia.edu, kernel-team@android.com,
Andre Przywara <andre.przywara@arm.com>
Subject: Re: [PATCH 1/4] irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR, CES}
Date: Tue, 15 Mar 2022 23:16:05 +0000 [thread overview]
Message-ID: <YjEeNThfYFtTffWz@google.com> (raw)
In-Reply-To: <20220314164044.772709-2-maz@kernel.org>
Hi Marc,
On Mon, Mar 14, 2022 at 04:40:41PM +0000, Marc Zyngier wrote:
> As we're about to expose GICR_CTLR.{IR,CES} to guests, populate
> the include file with the architectural values.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> include/linux/irqchip/arm-gic-v3.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
> index 12d91f0dedf9..aeb8ced53880 100644
> --- a/include/linux/irqchip/arm-gic-v3.h
> +++ b/include/linux/irqchip/arm-gic-v3.h
> @@ -127,6 +127,8 @@
> #define GICR_PIDR2 GICD_PIDR2
>
> #define GICR_CTLR_ENABLE_LPIS (1UL << 0)
> +#define GICR_CTLR_IR (1UL << 1)
> +#define GICR_CTLR_CES (1UL << 2)
I think these are backwards (IR is bit 2)
https://developer.arm.com/documentation/ddi0595/2021-12/External-Registers/GICR-CTLR--Redistributor-Control-Register?lang=en
--
Thanks,
Oliver
> #define GICR_CTLR_RWP (1UL << 3)
>
> #define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff)
> --
> 2.34.1
>
> _______________________________________________
> kvmarm mailing list
> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
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next prev parent reply other threads:[~2022-03-15 23:17 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-14 16:40 [PATCH 0/4] KVM: arm64: vgic-v3: MMIO-based LPI invalidation and co Marc Zyngier
2022-03-14 16:40 ` [PATCH 1/4] irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR, CES} Marc Zyngier
2022-03-15 23:16 ` Oliver Upton [this message]
2022-03-16 9:29 ` Marc Zyngier
2022-03-14 16:40 ` [PATCH 2/4] KVM: arm64: vgic-v3: Implement MMIO-based LPI invalidation Marc Zyngier
2022-03-16 5:26 ` Oliver Upton
2022-03-16 9:31 ` Marc Zyngier
2022-03-14 16:40 ` [PATCH 3/4] KVM: arm64: vgic-v3: Expose GICR_CTLR.RWP when disabling LPIs Marc Zyngier
2022-03-16 5:39 ` Oliver Upton
2022-03-14 16:40 ` [PATCH 4/4] KVM: arm64: vgic-v3: Advertise GICR_CTLR.{IR, CES} as a new GICD_IIDR revision Marc Zyngier
2022-03-15 23:13 ` Oliver Upton
2022-03-16 9:27 ` Marc Zyngier
2022-03-16 15:01 ` Marc Zyngier
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