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[73.14.97.161]) by smtp.gmail.com with ESMTPSA id q197-20020a6b8ece000000b00648d615e80csm8501663iod.41.2022.03.21.08.50.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:50:27 -0700 (PDT) Date: Mon, 21 Mar 2022 09:50:24 -0600 From: dann frazier To: Rob Herring Cc: Marc Zyngier , "linux-kernel@vger.kernel.org" , linux-arm-kernel , PCI , Toan Le , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Bjorn Helgaas , =?iso-8859-1?Q?St=E9phane?= Graber , Android Kernel Team Subject: Re: [PATCH v2 0/2] PCI: xgene: Restore working PCIe functionnality Message-ID: References: <20220321104843.949645-1-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220321_085034_724755_C4F53553 X-CRM114-Status: GOOD ( 27.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Mar 21, 2022 at 10:17:34AM -0500, Rob Herring wrote: > On Mon, Mar 21, 2022 at 5:49 AM Marc Zyngier wrote: > > > > Since 6dce5aa59e0b ("PCI: xgene: Use inbound resources for setup") was > > merged in the 5.5 time frame, PCIe on the venerable XGene platform has > > been unusable: 6dce5aa59e0b broke both XGene-1 (Mustang and m400) and > > XGene-2 (Merlin), while the addition of c7a75d07827a ("PCI: xgene: Fix > > IB window setup") fixed XGene-2, but left the rest of the zoo > > unusable. > > > > It is understood that this systems come with "creative" DTs that don't > > match the expectations of modern kernels. However, there is little to > > be gained by forcing these changes on users -- the firmware is not > > upgradable, and the current owner of the IP will deny that these > > machines have ever existed. > > The gain for fixing this properly is not having drivers do their own > dma-ranges parsing. We've seen what happens when drivers do their own > parsing of standard properties (e.g. interrupt-map). Currently, we > don't have any drivers doing their own parsing: > > $ git grep of_pci_dma_range_parser_init > drivers/of/address.c:int of_pci_dma_range_parser_init(struct > of_pci_range_parser *parser, > drivers/of/address.c:EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init); > drivers/of/address.c:#define of_dma_range_parser_init > of_pci_dma_range_parser_init > drivers/of/unittest.c: if (of_pci_dma_range_parser_init(&parser, np)) { > drivers/pci/of.c: err = of_pci_dma_range_parser_init(&parser, dev_node); > include/linux/of_address.h:extern int > of_pci_dma_range_parser_init(struct of_pci_range_parser *parser, > include/linux/of_address.h:static inline int > of_pci_dma_range_parser_init(struct of_pci_range_parser *parser, > > And we can probably further refactor this to be private to drivers/pci/of.c. > > For XGene-2 the issue is simply that the driver depends on the order > of dma-ranges entries. > > For XGene-1, I'd still like to understand what the issue is. Reverting > the first fix and fixing 'dma-ranges' should have fixed it. I need a > dump of how the IB registers are initialized in both cases. Happy to provide that for the m400 if told how :) -dann > I'm not > saying changing 'dma-ranges' in the firmware is going to be required > here. There's a couple of other ways we could fix that without a > firmware change, but first I need to understand why it broke. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel