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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id s125-20020acaa983000000b002ecdbaf98fesm11374779oie.34.2022.04.11.07.14.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 07:14:04 -0700 (PDT) Received: (nullmailer pid 1159237 invoked by uid 1000); Mon, 11 Apr 2022 14:14:03 -0000 Date: Mon, 11 Apr 2022 09:14:03 -0500 From: Rob Herring To: Mark Rutland Cc: Will Deacon , Al Grant , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm_pmu: Validate single/group leader events Message-ID: References: <20220408203330.4014015-1-robh@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220411_071406_464315_5BFAD395 X-CRM114-Status: GOOD ( 17.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Apr 11, 2022 at 11:04:26AM +0100, Mark Rutland wrote: > Hi Rob, > > On Fri, Apr 08, 2022 at 03:33:30PM -0500, Rob Herring wrote: > > In the case where there is only a cycle counter available (i.e. > > PMCR_EL0.N is 0) and an event other than CPU cycles is opened, the open > > should fail as the event can never possibly be scheduled. However, the > > event validation when an event is opened is skipped when the group > > leader is opened. Fix this by always validating the group leader events. > > > > Reported-by: Al Grant > > Cc: Will Deacon > > Cc: Mark Rutland > > Signed-off-by: Rob Herring > > This looks obviously correct to me, so FWIW: > > Acked-by: Mark Rutland Thanks. > Just to check, have you tested this (e.g. by running on a platform with > PMCR_EL0.N == 0, or hacking the PMU probing to report just the cycle counter) Yes, tested on FVP with 0 counters running the libperf evsel userspace access tests as that tries both the cycle counter and instruction counts. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel