From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8E6CAC433EF for ; Thu, 21 Apr 2022 14:45:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=stS1jHEcFE34MwMkafxmQb+gZtT43CDAJBqFaRn75Uo=; b=W76Czsgh7ywEQx v/TVJBCoYRmwHsKIqMYBT2uf6Wek0Mlvf12Bz2r7dywFyYGm/+Hpb/23VgXFOTALVhKYbWTXMRGsG 1Hp+9H8nZKCjElNREkYpI34oFK6JLRHE8TCHu+AC8DvTBPthzrItAt2dlhLUr87YUXucfoiJlDRaL 6BEm5X/BjgRQjqTg0uYYhvljVCd+SdGhE8xRx+M38SRYjEbeURGOc8UTXBcjvACMag9PIK9y0FlLc ZuG1ocL23tE0xKB2ekNWivu4Pdm9w1XQT8NfKvPeVozGo6ezrrTnjRTLhU16i23k+x4XEDsWyfrAm O5rr/fxAfTriRqRuongg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhY2m-00DqZx-29; Thu, 21 Apr 2022 14:44:28 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhY2a-00DqTn-4e for linux-arm-kernel@lists.infradead.org; Thu, 21 Apr 2022 14:44:19 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7B5F7619D0; Thu, 21 Apr 2022 14:44:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7EB93C385A5; Thu, 21 Apr 2022 14:44:12 +0000 (UTC) Date: Thu, 21 Apr 2022 15:44:08 +0100 From: Catalin Marinas To: Arnd Bergmann Cc: Christoph Hellwig , Ard Biesheuvel , Herbert Xu , Will Deacon , Marc Zyngier , Greg Kroah-Hartman , Andrew Morton , Linus Torvalds , Linux Memory Management List , Linux ARM , Linux Kernel Mailing List , "David S. Miller" Subject: Re: [PATCH 07/10] crypto: Use ARCH_DMA_MINALIGN instead of ARCH_KMALLOC_MINALIGN Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220421_074416_363671_7371979B X-CRM114-Status: GOOD ( 32.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Apr 21, 2022 at 03:47:30PM +0200, Arnd Bergmann wrote: > On Thu, Apr 21, 2022 at 3:25 PM Catalin Marinas wrote: > > On Thu, Apr 21, 2022 at 02:28:45PM +0200, Arnd Bergmann wrote: > > > We also know that larger slabs are all cacheline aligned, so simply > > > comparing the transfer size is enough to rule out most, in this case > > > any transfer larger than 96 bytes must come from the kmalloc-128 > > > or larger cache, so that works like before. > > > > There's also the case with 128-byte cache lines and kmalloc-192. > > Sure, but that's much less common, as the few machines with 128 byte > cache lines tend to also have cache coherent devices IIRC, so we'd > skip the bounce buffer entirely. Do you know which machines still have 128-byte cache lines _and_ non-coherent DMA? If there isn't any that matters, I'd reduce ARCH_DMA_MINALIGN to 64 now (while trying to get to even smaller kmalloc caches). > > > For transfers <=96 bytes, the possibilities are: > > > > > > 1.kmalloc-32 or smaller, always needs to bounce > > > 2. kmalloc-96, but at least one byte in partial cache line, > > > need to bounce > > > 3. kmalloc-64, may skip the bounce. > > > 4. kmalloc-128 or larger, or not a slab cache but a partial > > > transfer, may skip the bounce. > > > > > > I would guess that the first case is the most common here, > > > so unless bouncing one or two cache lines is extremely > > > expensive, I don't expect it to be worth optimizing for the latter > > > two cases. > > > > I think so. If someone complains of a performance regression, we can > > look at optimising the bounce. I have a suspicion the cost of copying > > two cache lines is small compared to swiotlb_find_slots() etc. > > That is possible, and we'd definitely have to watch out for > performance regressions, I'm just skeptical that the cases that > suffer from the extra bouncer buffering on 33..64 byte allocations > benefit much from having a special case if the 1...32 and 65..96 > byte allocations are still slow. > > Another simpler way to do this might be to just not create the > kmalloc-96 (or kmalloc-192) caches, and assuming that any > transfer >=33 (or 65) bytes is safe. I'll give the dma bounce idea a go next week, see how it looks. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel