From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BCC7BC433EF for ; Fri, 22 Apr 2022 12:31:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wizKMzC1YZ5p1DYR4OP7IwxStWB5OI+G0rgurB2FA4s=; b=0Jt6EsqUdZ2Or8 htnDs4UUkxE0ZFQAuc5lbKRsn7anyw7GNevNT/qrkHNNLBy8HdxHSDc3/1bnwI8JHbCDCxWiJzz8k cZP8s9LAsgkB/US+qjK5wsQ4cHTfaFavGMdQ9Dauw93Gugtp7nY2piwC87Y3B7XJfpLdIxAHsuRhM ipBZmbaZtV3AEmYoBVrvlJT06fSnqzZrQDl9Wq6OrK3oLBwSDVpEn5ShAyy5zIaQTmYxGoWHCgv7b Muzn8jDvgMpABQJzyKLGZKGiLybd1dtLn6BqhrMm5i+oxHX5xSQOTcF/Mu0ozDoiaCQb3bLrft+Sl NmeRahFbZpRuz1KQzJgQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhsR0-000PBT-5R; Fri, 22 Apr 2022 12:30:50 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhsQg-000P3H-CM for linux-arm-kernel@lists.infradead.org; Fri, 22 Apr 2022 12:30:32 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id BEF886200F; Fri, 22 Apr 2022 12:30:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 95024C385A4; Fri, 22 Apr 2022 12:30:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1650630629; bh=l/UThzJt7EIh5W2gfH2rbyMyEURpsdabio8nxJX2/N8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=q6+ZXnG4VO5fCl1Ebfighwz76rxZODtuBiM9HyI8n5LXwm2fvI9pn9cD3zGtogan8 JC2XS1g4Drt9bmofls+4vWo1uygB7PcbG70TGUaK9aO/3LVa2XddVq47dUXmO30BYB NvmPSPoSi1AE59bfThsi+ZtMaCe+ZHe8ZMqNf7S0= Date: Fri, 22 Apr 2022 14:30:26 +0200 From: Greg Kroah-Hartman To: Qing Wang Cc: Catalin Marinas , Will Deacon , Sudeep Holla , "Rafael J. Wysocki" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, vincent.guittot@linaro.org, dietmar.eggemann@arm.com Subject: Re: [PATCH V2 1/2] arch_topology: support for parsing cache topology from DT Message-ID: References: <1650628289-67716-1-git-send-email-wangqing@vivo.com> <1650628289-67716-2-git-send-email-wangqing@vivo.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1650628289-67716-2-git-send-email-wangqing@vivo.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220422_053030_578242_5DB3769D X-CRM114-Status: GOOD ( 29.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Apr 22, 2022 at 04:51:25AM -0700, Qing Wang wrote: > From: Wang Qing > > When ACPI is not enabled, we can get cache topolopy from DT like: > * cpu0: cpu@000 { > * next-level-cache = <&L2_1>; > * L2_1: l2-cache { > * compatible = "cache"; > * next-level-cache = <&L3_1>; > * }; > * L3_1: l3-cache { > * compatible = "cache"; > * }; > * }; > * > * cpu1: cpu@001 { > * next-level-cache = <&L2_1>; > * }; > * ... > * }; > cache_topology[] hold the pointer describing by "next-level-cache", > which can describe the cache topology of every level. > > MAX_CACHE_LEVEL is strictly corresponding to the cache level from L2. I have no idea what this changelog means at all. What are you trying to do? What problem are you solving? Why are you doing any of this? > > V2: > make function name more sense As per the documentation this goes below the --- line, right? > > Signed-off-by: Wang Qing > --- > drivers/base/arch_topology.c | 47 ++++++++++++++++++++++++++++++++++- > include/linux/arch_topology.h | 3 +++ > 2 files changed, 49 insertions(+), 1 deletion(-) > > diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c > index 1d6636ebaac5..46e84ce2ec0c 100644 > --- a/drivers/base/arch_topology.c > +++ b/drivers/base/arch_topology.c > @@ -480,8 +480,10 @@ static int __init get_cpu_for_node(struct device_node *node) > return -1; > > cpu = of_cpu_node_to_id(cpu_node); > - if (cpu >= 0) > + if (cpu >= 0) { > topology_parse_cpu_capacity(cpu_node, cpu); > + topology_parse_cpu_caches(cpu_node, cpu); > + } > else > pr_info("CPU node for %pOF exist but the possible cpu range is :%*pbl\n", > cpu_node, cpumask_pr_args(cpu_possible_mask)); > @@ -647,6 +649,49 @@ static int __init parse_dt_topology(void) > } > #endif > > +/* > + * cpu cache topology table > + */ > +#define MAX_CACHE_LEVEL 7 > +static struct device_node *cache_topology[NR_CPUS][MAX_CACHE_LEVEL]; So for a normal big system of 4k cpus * 7 levels, that's a lot of memory? are you sure? How big of a box did you test this on? > + > +void topology_parse_cpu_caches(struct device_node *cpu_node, int cpu) > +{ > + struct device_node *node_cache = cpu_node; > + int level = 0; > + > + while (level < MAX_CACHE_LEVEL) { > + node_cache = of_parse_phandle(node_cache, "next-level-cache", 0); > + if (!node_cache) > + break; > + > + cache_topology[cpu][level++] = node_cache; > + } No locking anywhere? What could go wrong :( > +} > + > +/* > + * find the largest subset of the shared cache in the range of cpu_mask > + */ > +void find_subset_of_share_cache(const struct cpumask *cpu_mask, int cpu, > + struct cpumask *sc_mask) Again, horrid global function name. And no kernel documentation for how this works? > +{ > + int cache_level, cpu_id; > + > + for (cache_level = MAX_CACHE_LEVEL - 1; cache_level >= 0; cache_level--) { > + if (!cache_topology[cpu][cache_level]) > + continue; No locking??? > + > + cpumask_clear(sc_mask); > + for (cpu_id = 0; cpu_id < NR_CPUS; cpu_id++) { > + if (cache_topology[cpu][cache_level] == cache_topology[cpu_id][cache_level]) > + cpumask_set_cpu(cpu_id, sc_mask); > + } > + > + if (cpumask_subset(sc_mask, cpu_mask)) > + break; > + } > +} > + > /* > * cpu topology table > */ > diff --git a/include/linux/arch_topology.h b/include/linux/arch_topology.h > index 58cbe18d825c..c6ed727e453c 100644 > --- a/include/linux/arch_topology.h > +++ b/include/linux/arch_topology.h > @@ -93,6 +93,9 @@ void update_siblings_masks(unsigned int cpu); > void remove_cpu_topology(unsigned int cpuid); > void reset_cpu_topology(void); > int parse_acpi_topology(void); > +void topology_parse_cpu_caches(struct device_node *cpu_node, int cpu); > +void find_subset_of_share_cache(const struct cpumask *cpu_mask, int cpu, > + struct cpumask *sc_mask); I still have no idea what this last function is supposed to do. And very odd indentation, did you run checkpatch on this? totally confused, greg k-h _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel