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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id n62-20020acaef41000000b002ef646e6690sm4262334oih.53.2022.04.25.14.55.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Apr 2022 14:55:05 -0700 (PDT) Received: (nullmailer pid 360889 invoked by uid 1000); Mon, 25 Apr 2022 21:55:04 -0000 Date: Mon, 25 Apr 2022 16:55:04 -0500 From: Rob Herring To: Tony Lindgren Cc: Nishanth Menon , Daniel Lezcano , Rob Herring , linux-omap@vger.kernel.org, Keerthy , Vignesh Raghavendra , Krzysztof Kozlowski , Krzysztof Kozlowski , Grygorii Strashko , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v5 1/2] dt-bindings: timer: Update TI timer to yaml Message-ID: References: <20220414085807.7389-1-tony@atomide.com> <20220414085807.7389-2-tony@atomide.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220414085807.7389-2-tony@atomide.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220425_145507_145028_364D514F X-CRM114-Status: GOOD ( 21.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 14 Apr 2022 11:58:06 +0300, Tony Lindgren wrote: > Let's update the TI timer binding to use yaml. As this binding is specific > to the TI dual-mode timers also known as dm-timers, let's use file name > ti,timer-dm.yaml to avoid confusion with other timers. > > We add checks for the deprecated ti,hwmods property as done for other TI > device driver bindings earlier. > > We also correct the issue with the old binding that was out of date for > several properties. > > The am43 related timers are undocumented, but compatible with the am3 > timers. Let's add the am43 timers too. > > The dm814 and dm816 timers are missing, let's add them. > > Some timers on some SoCs are dual mapped, like the ABE timers on omap4 > and 5. The reg property maxItems must be updated to 2. > > The timer clocks can be managed by the parent interconnect target module > with no clocks assigned for the timer node. And in some cases, the SoC may > need to configure additional system clock for the timer in addition to the > functional clock. > > The clock names are optional and not specific to the comptible property. > For example, dra7 timers on l3 interconnect do not need clock-names, while > the timers on dra7 l4 interconnect need them with both being compatible > with ti,omap5430-timer. > > Cc: Daniel Lezcano > Cc: Grygorii Strashko > Cc: Keerthy > Cc: Nishanth Menon > Cc: Vignesh Raghavendra > Signed-off-by: Tony Lindgren > --- > .../bindings/pwm/pwm-omap-dmtimer.txt | 2 +- > .../bindings/timer/ti,timer-dm.yaml | 142 ++++++++++++++++++ > .../devicetree/bindings/timer/ti,timer.txt | 44 ------ > 3 files changed, 143 insertions(+), 45 deletions(-) > create mode 100644 Documentation/devicetree/bindings/timer/ti,timer-dm.yaml > delete mode 100644 Documentation/devicetree/bindings/timer/ti,timer.txt > Applied, thanks! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel