From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EB741C433F5 for ; Wed, 4 May 2022 10:53:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jZAqIHwTNnHvOqcbZfPX0QarXGuPPqJrVRFGm0ouWNc=; b=38Sj5+zH5Q7KAY LgbBp08S0Dbzc57oqzODPtq0SPrO9KO3yuSzLqq4HEcuDdp7qyOkPYsDX7kN5JmplJuWV5VXybg7I 5UJnQbFNWkpEXNMG9pQaisyhqQFTAiVWwckPChv3RM48ZcUPpd2XFo6ZfywY5MQLWqTTVwwyOZd6d tf2yhiAhn459iX13Sp12p1UtsVyulWiu07GfR0nUewEc1+Zs31ddyTgPtYdmGCYrYp2Rp9/iVmtHm 1lt/lAzK8I+PN+zBcIcfGCecSq6yzyIn/IfLU55bOctp0XZwxHL1MkmoHG8/++0L6+1mVnCHTnkbX ACFVs6HCyww/0Y2wTHQw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmCcE-00ALTf-HF; Wed, 04 May 2022 10:52:18 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmCc7-00ALQc-Cj for linux-arm-kernel@lists.infradead.org; Wed, 04 May 2022 10:52:12 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5C1A461AB9; Wed, 4 May 2022 10:52:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B4908C385A4; Wed, 4 May 2022 10:52:06 +0000 (UTC) Date: Wed, 4 May 2022 11:52:03 +0100 From: Catalin Marinas To: Michal Orzel Cc: Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bertrand.marquis@arm.com Subject: Re: [PATCH] arm64: cputype: Avoid overflow using MIDR_IMPLEMENTOR_MASK Message-ID: References: <20220426070603.56031-1-michal.orzel@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220426070603.56031-1-michal.orzel@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220504_035211_505042_E248BC8D X-CRM114-Status: GOOD ( 15.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Apr 26, 2022 at 09:06:03AM +0200, Michal Orzel wrote: > Value of macro MIDR_IMPLEMENTOR_MASK exceeds the range of integer > and can lead to overflow. Currently there is no issue as it is used > in expressions implicitly casting it to u32. To avoid possible > problems, fix the macro. > > Signed-off-by: Michal Orzel > --- > Should we also add a U suffix to ARM_CPU_IMP_* macros that are also shifted > by MIDR_IMPLEMENTOR_SHIFT? None of them has bit 7 set but we could take some > precaution steps. I'm ok with not adding it now. We haven't been consistent with this but we did encounter a few issues in the past with other bits and only fixed those that were touching bit 31. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel