From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B4B8C433F5 for ; Wed, 4 May 2022 13:36:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZsRaCzwlSIZC0WeAbFF0mx+q4e/ZGHAzZQ8rmAdjj7M=; b=mde0esGYbE+nEv ZozG6IAeJFvV8VBqATTsSsJRlA40SbtDF0IpakyttGJgILwSnkIHY1WWZpogWivfbWt1gfs86ZeUU Y9Klw9Qo7nDNSTcPWCP/1AwiwoEsXObe4ed3DvHc1eJeVQbrX7joys07FgZVhfOpRwB6dxEynHZn0 STeJaUqGElEOxFslpGGvIQeBVZiQS/TJsOHdCrBywf39hk4zH3e6BPsigr33dx27typJXCp3c3ciG g4NQaxthUHkQ7QIe5Cn7Y8gB0Mqmldewx3qEbV+nI4zYMEf+KyzGR6b15kz4t9ivQZAJHqgrp+nTp aZyV0mwlF6stJg0MrWyA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmFAJ-00B6cy-Gd; Wed, 04 May 2022 13:35:39 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmFAF-00B6bc-U7 for linux-arm-kernel@lists.infradead.org; Wed, 04 May 2022 13:35:37 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2B1FA1042; Wed, 4 May 2022 06:35:34 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.1.13]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0912D3FA49; Wed, 4 May 2022 06:35:32 -0700 (PDT) Date: Wed, 4 May 2022 14:35:25 +0100 From: Mark Rutland To: Mark Brown Cc: Catalin Marinas , Will Deacon , Marc Zyngier , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v6 05/12] arm64/sysreg: Define bits for previously RES1 fields in SCTLR_EL1 Message-ID: References: <20220503170233.507788-1-broonie@kernel.org> <20220503170233.507788-6-broonie@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220503170233.507788-6-broonie@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220504_063536_107217_AD4DDD0D X-CRM114-Status: GOOD ( 16.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, May 03, 2022 at 06:02:26PM +0100, Mark Brown wrote: > In older revisions of the architecture SCTLR_EL1 contained several RES1 > fields but in DDI0487H.a these now all have assigned functions. In > preparation for automatically generating sysreg.h provide explicit > definitions for all these bits and use them in the INIT_SCTLR_EL1_ macros > where _RES1 was previously used. > > There should be no functional change. > > Signed-off-by: Mark Brown AFAICT all the bits are good, and there should be no functional change: Reviewed-by: Mark Rutland Mark. > --- > arch/arm64/include/asm/sysreg.h | 53 ++++++++++++++++++++------------- > 1 file changed, 32 insertions(+), 21 deletions(-) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index 7e9de3c87cd9..331e2521a81a 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -633,19 +633,24 @@ > > #define SCTLR_ELx_ENIA_SHIFT 31 > > -#define SCTLR_ELx_ITFSB (BIT(37)) > -#define SCTLR_ELx_ENIA (BIT(SCTLR_ELx_ENIA_SHIFT)) > -#define SCTLR_ELx_ENIB (BIT(30)) > -#define SCTLR_ELx_ENDA (BIT(27)) > -#define SCTLR_ELx_EE (BIT(25)) > -#define SCTLR_ELx_IESB (BIT(21)) > -#define SCTLR_ELx_WXN (BIT(19)) > -#define SCTLR_ELx_ENDB (BIT(13)) > -#define SCTLR_ELx_I (BIT(12)) > -#define SCTLR_ELx_SA (BIT(3)) > -#define SCTLR_ELx_C (BIT(2)) > -#define SCTLR_ELx_A (BIT(1)) > -#define SCTLR_ELx_M (BIT(0)) > +#define SCTLR_ELx_ITFSB (BIT(37)) > +#define SCTLR_ELx_ENIA (BIT(SCTLR_ELx_ENIA_SHIFT)) > +#define SCTLR_ELx_ENIB (BIT(30)) > +#define SCTLR_ELx_LSMAOE (BIT(29)) > +#define SCTLR_ELx_nTLSMD (BIT(28)) > +#define SCTLR_ELx_ENDA (BIT(27)) > +#define SCTLR_ELx_EE (BIT(25)) > +#define SCTLR_ELx_EIS (BIT(22)) > +#define SCTLR_ELx_IESB (BIT(21)) > +#define SCTLR_ELx_TSCXT (BIT(20)) > +#define SCTLR_ELx_WXN (BIT(19)) > +#define SCTLR_ELx_ENDB (BIT(13)) > +#define SCTLR_ELx_I (BIT(12)) > +#define SCTLR_ELx_EOS (BIT(11)) > +#define SCTLR_ELx_SA (BIT(3)) > +#define SCTLR_ELx_C (BIT(2)) > +#define SCTLR_ELx_A (BIT(1)) > +#define SCTLR_ELx_M (BIT(0)) > > /* SCTLR_EL2 specific flags. */ > #define SCTLR_EL2_RES1 ((BIT(4)) | (BIT(5)) | (BIT(11)) | (BIT(16)) | \ > @@ -686,22 +691,24 @@ > > #define SCTLR_EL1_BT1 (BIT(36)) > #define SCTLR_EL1_BT0 (BIT(35)) > +#define SCTLR_EL1_LSMAOE (BIT(29)) > +#define SCTLR_EL1_nTLSMD (BIT(28)) > #define SCTLR_EL1_UCI (BIT(26)) > #define SCTLR_EL1_E0E (BIT(24)) > #define SCTLR_EL1_SPAN (BIT(23)) > +#define SCTLR_EL1_EIS (BIT(22)) > +#define SCTLR_EL1_TSCXT (BIT(20)) > #define SCTLR_EL1_nTWE (BIT(18)) > #define SCTLR_EL1_nTWI (BIT(16)) > #define SCTLR_EL1_UCT (BIT(15)) > #define SCTLR_EL1_DZE (BIT(14)) > +#define SCTLR_EL1_EOS (BIT(11)) > #define SCTLR_EL1_UMA (BIT(9)) > #define SCTLR_EL1_SED (BIT(8)) > #define SCTLR_EL1_ITD (BIT(7)) > #define SCTLR_EL1_CP15BEN (BIT(5)) > #define SCTLR_EL1_SA0 (BIT(4)) > > -#define SCTLR_EL1_RES1 ((BIT(11)) | (BIT(20)) | (BIT(22)) | (BIT(28)) | \ > - (BIT(29))) > - > #ifdef CONFIG_CPU_BIG_ENDIAN > #define ENDIAN_SET_EL1 (SCTLR_EL1_E0E | SCTLR_ELx_EE) > #else > @@ -709,13 +716,17 @@ > #endif > > #define INIT_SCTLR_EL1_MMU_OFF \ > - (ENDIAN_SET_EL1 | SCTLR_EL1_RES1) > + (ENDIAN_SET_EL1 | SCTLR_EL1_LSMAOE | SCTLR_EL1_nTLSMD | \ > + SCTLR_EL1_EIS | SCTLR_EL1_TSCXT | SCTLR_EL1_EOS) > > #define INIT_SCTLR_EL1_MMU_ON \ > - (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | SCTLR_EL1_SA0 | \ > - SCTLR_EL1_SED | SCTLR_ELx_I | SCTLR_EL1_DZE | SCTLR_EL1_UCT | \ > - SCTLR_EL1_nTWE | SCTLR_ELx_IESB | SCTLR_EL1_SPAN | SCTLR_ELx_ITFSB | \ > - ENDIAN_SET_EL1 | SCTLR_EL1_UCI | SCTLR_EL1_EPAN | SCTLR_EL1_RES1) > + (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | \ > + SCTLR_EL1_SA0 | SCTLR_EL1_SED | SCTLR_ELx_I | \ > + SCTLR_EL1_DZE | SCTLR_EL1_UCT | SCTLR_EL1_nTWE | \ > + SCTLR_ELx_IESB | SCTLR_EL1_SPAN | SCTLR_ELx_ITFSB | \ > + ENDIAN_SET_EL1 | SCTLR_EL1_UCI | SCTLR_EL1_EPAN | \ > + SCTLR_EL1_LSMAOE | SCTLR_EL1_nTLSMD | SCTLR_EL1_EIS | \ > + SCTLR_EL1_TSCXT | SCTLR_EL1_EOS) > > /* MAIR_ELx memory attributes (used by Linux) */ > #define MAIR_ATTR_DEVICE_nGnRnE UL(0x00) > -- > 2.30.2 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel