From: Mark Brown <broonie@kernel.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 12/12] arm64/sysreg: Generate definitions for SCTLR_EL1
Date: Wed, 4 May 2022 17:40:42 +0100 [thread overview]
Message-ID: <YnKsiniWS+86usIr@sirena.org.uk> (raw)
In-Reply-To: <YnKqt929NLafY3Vd@FVFF77S0Q05N>
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On Wed, May 04, 2022 at 05:32:55PM +0100, Mark Rutland wrote:
> On Tue, May 03, 2022 at 06:02:33PM +0100, Mark Brown wrote:
> > Automatically generate register definitions for SCTLR_EL1. No functional
> > change.
> > -#define SYS_SCTLR_EL1 sys_reg(3, 0, 1, 0, 0)
> > +Sysreg SCTLR_EL1 3 0 1 9 9
> Looks like the 0s got replaced with 9s somehow?
> I guess at EL1 we happen to get away with that being completely wrong since
> we'll use the assembler's version of the register definition, and only KVM
> notices.
Ah, indeed - that'll just have been a typo when I originally entered
things.
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next prev parent reply other threads:[~2022-05-04 16:41 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 17:02 [PATCH v6 00/12] arm64: Automatic system register definition generation Mark Brown
2022-05-03 17:02 ` [PATCH v6 01/12] arm64/sysreg: Introduce helpers for access to sysreg fields Mark Brown
2022-05-03 17:02 ` [PATCH v6 02/12] arm64/mte: Make TCF0 naming and field values more standard Mark Brown
2022-05-03 17:02 ` [PATCH v6 03/12] arm64/mte: Make TCF field values and naming " Mark Brown
2022-05-04 13:26 ` Mark Rutland
2022-05-03 17:02 ` [PATCH v6 04/12] arm64/sysreg: Rename SCTLR_EL1_NTWE/TWI to SCTLR_EL1_nTWE/TWI Mark Brown
2022-05-03 17:02 ` [PATCH v6 05/12] arm64/sysreg: Define bits for previously RES1 fields in SCTLR_EL1 Mark Brown
2022-05-04 13:35 ` Mark Rutland
2022-05-03 17:02 ` [PATCH v6 06/12] arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARM Mark Brown
2022-05-03 17:02 ` [PATCH v6 07/12] arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names Mark Brown
2022-05-03 17:02 ` [PATCH v6 08/12] arm64: Add sysreg header generation scripting Mark Brown
2022-05-03 17:02 ` [PATCH v6 09/12] arm64/sysreg: Enable automatic generation of system register definitions Mark Brown
2022-05-03 17:02 ` [PATCH v6 10/12] arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1 Mark Brown
2022-05-03 17:02 ` [PATCH v6 11/12] arm64/sysreg: Generate definitions for TTBRn_EL1 Mark Brown
2022-05-03 17:02 ` [PATCH v6 12/12] arm64/sysreg: Generate definitions for SCTLR_EL1 Mark Brown
2022-05-04 16:32 ` Mark Rutland
2022-05-04 16:40 ` Mark Brown [this message]
2022-05-04 17:56 ` Catalin Marinas
2022-05-04 16:17 ` [PATCH v6 00/12] arm64: Automatic system register definition generation Catalin Marinas
2022-05-04 19:58 ` Catalin Marinas
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