From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0EA71C433F5 for ; Thu, 5 May 2022 05:09:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uV7d/84v/Nvj3WRXOWShY/sfCR5zGk/s07wCsZonxXM=; b=aQArzA1dpBU/sB 1nYhhgRDFp+eMUOBoEjoMrizz5SEtSrh4hgwR7zomjf3FSpoFuoNn1Z4kOO0JWRsVSMlPGiutPrSf j7xcTwsXlGZcJ14V6G/tNAN2wtC/3aS5w0vxc6NyiPp7/ZEbJdY94n41744Vl4WsuO5o3IzRpVAy5 u6bmOCcdx5A/Rp9C50Bt4im2HfK6kfuPA9+vnyF/H5qfQGusGOpmHIKaxCqCljgYqTj5vbuXLjlmL rnp9LdVfrUTqH2uV3s3uuQ0VjzmXidzaP7BB2oNuhTWqvFrfjZ85zYpVlVDz0Odm+8CqJO1QhlmfR SgWRL1UwKLYT8Bmr+R6w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmTjI-00DzKq-CD; Thu, 05 May 2022 05:08:44 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmTjE-00DzK2-L0 for linux-arm-kernel@lists.infradead.org; Thu, 05 May 2022 05:08:42 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AB01E61ACC; Thu, 5 May 2022 05:08:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CAFC3C385A4; Thu, 5 May 2022 05:08:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651727319; bh=lBK8/trxgvR1f4DEH1CbdWJ4Y+Fce8JnB+5d9H6RVS0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=suSziVbVT9y/3fYePbKPNEptGZeRtOsVOFwhAm+gaQTOpu2HbcFR6CdEGNm3Xiolx wyDNW+cVr3bW8fUTb0JjVCKscsjlkrhj+3wLACt7cFD4CJnPVY0e/06E58IQPGkvQK 9cT2ALQqC8XuyuDB7peO/lCupdbzCR1f9c+ICnAWvYfjISd4PRYlms6y3xZU+ebN49 lUnnA44MyGDnvec6LYVkImKIQ1QaBr0mFFnlYenBI0LyovtQi/Ibue/gBtm0c7DeD/ WFHoN3v9CBjzjXKVv2OAG1EWSzDp+Y9dWbx2gylVnOvkdkC0EqhAdLQ9nowJyIzmKE pPMYQSOIw0MWA== Date: Wed, 4 May 2022 22:08:37 -0700 From: Eric Biggers To: Nathan Huckleberry Cc: linux-crypto@vger.kernel.org, linux-fscrypt@vger.kernel.org, Herbert Xu , "David S. Miller" , linux-arm-kernel@lists.infradead.org, Paul Crowley , Sami Tolvanen , Ard Biesheuvel Subject: Re: [PATCH v6 7/9] crypto: x86/polyval: Add PCLMULQDQ accelerated implementation of POLYVAL Message-ID: References: <20220504001823.2483834-1-nhuck@google.com> <20220504001823.2483834-8-nhuck@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220504001823.2483834-8-nhuck@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220504_220840_767077_7E7F0082 X-CRM114-Status: GOOD ( 17.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, May 04, 2022 at 12:18:21AM +0000, Nathan Huckleberry wrote: > +.macro schoolbook1_iteration i xor_sum > + movups (16*\i)(MSG), %xmm0 > + .if (\i == 0 && \xor_sum == 1) > + pxor SUM, %xmm0 > + .endif > + vpclmulqdq $0x01, (16*\i)(KEY_POWERS), %xmm0, %xmm2 > + vpclmulqdq $0x00, (16*\i)(KEY_POWERS), %xmm0, %xmm1 > + vpclmulqdq $0x10, (16*\i)(KEY_POWERS), %xmm0, %xmm3 > + vpclmulqdq $0x11, (16*\i)(KEY_POWERS), %xmm0, %xmm4 > + vpxor %xmm2, MI, MI > + vpxor %xmm1, LO, LO > + vpxor %xmm4, HI, HI > + vpxor %xmm3, MI, MI > +.endm The 8 lines above are indented with spaces. They should use tabs, like everywhere else. > + * So our final computation is: T = T_1 : T_0 = g*(x) * P_0 V = V_1 : V_0 = > + * g*(x) * (P_1 + T_0) p(x) / x^{128} mod g(x) = P_3 + P_1 + T_0 + V_1 : P_2 + > + * P_0 + T_1 + V_0 This part is unreadable now -- it looks like you formatted it as regular text? The three equations should be on their own lines, like how it was before. > +__maybe_unused static const struct x86_cpu_id pcmul_cpu_id[] = { > + X86_MATCH_FEATURE(X86_FEATURE_PCLMULQDQ, NULL), > + X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL), > + {} > +}; > +MODULE_DEVICE_TABLE(x86cpu, pcmul_cpu_id); > + > +static int __init polyval_clmulni_mod_init(void) > +{ > + if (!x86_match_cpu(pcmul_cpu_id)) > + return -ENODEV; > + > + return crypto_register_shash(&polyval_alg); > +} > + > +static void __exit polyval_clmulni_mod_exit(void) > +{ > + crypto_unregister_shash(&polyval_alg); > +} This won't work as intended; it's registering the algorithm (and autoloading the module) if PCLMUL *or* AVX is available, rather than PCLMUL *and* AVX. I think the way to go is to just have X86_FEATURE_PCLMULQDQ in the table, like before, and add a check for boot_cpu_has(X86_FEATURE_AVX) in the init function. - Eric _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel