From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22816C433F5 for ; Fri, 6 May 2022 10:11:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MqjSGzpGYVAYwib8TrUWupeveC5VSrLGX1dTSyiFTQk=; b=S8lZE+nPrbd9hT FUrtJnfBvig2R1vpXvFN1bu02Unx+nYBtbwmPByn2QU39jUu0wZSSjP+BHQJAdBf+DTOq0Nlk0c/k XGZ5PZTfWvMhH7YoJaN5Io+Pusw9AIgWU4i0i5/pyBIFXQKcGBXX/3oEhs4Ba9B3qBVWmNv9jnU0R q1esDGoOmThT+m7JukCdjhDh1AOf8DsHtY6EhXS64CiQb/VY+pMaYWOa9kBn4rmSknqj++adm+iC+ 6/14nPgMp+r2jLixeGeObnZXdNj8Sbs7YER1FjzQ1YunBWmfn1YeCccKM043aPOj42Jdk/wxz7Dsi 6bbjS/8wR+u1kolvDamw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmuuO-002dDJ-7W; Fri, 06 May 2022 10:10:00 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmuuF-002dBj-UN for linux-arm-kernel@lists.infradead.org; Fri, 06 May 2022 10:09:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2B96714BF; Fri, 6 May 2022 03:09:51 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.65.197]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2AD5F3FA31; Fri, 6 May 2022 03:09:50 -0700 (PDT) Date: Fri, 6 May 2022 11:09:46 +0100 From: Mark Rutland To: "Leizhen (ThunderTown)" Cc: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3] arm64: add the printing of tpidr_elx in __show_regs() Message-ID: References: <20220505095640.312-1-thunder.leizhen@huawei.com> <307e4def-1e4a-1110-e644-d485b9959ab1@huawei.com> <7c1207fa-56aa-1b33-31fd-3ec395b08f2b@huawei.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <7c1207fa-56aa-1b33-31fd-3ec395b08f2b@huawei.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220506_030952_066093_F12D655D X-CRM114-Status: GOOD ( 22.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, May 06, 2022 at 04:16:55PM +0800, Leizhen (ThunderTown) wrote: > > > On 2022/5/5 21:34, Leizhen (ThunderTown) wrote: > > On 2022/5/5 21:26, Leizhen (ThunderTown) wrote: > >> On 2022/5/5 21:04, Mark Rutland wrote: > >>> On Thu, May 05, 2022 at 05:56:40PM +0800, Zhen Lei wrote: > >>>> Commit 7158627686f0 ("arm64: percpu: implement optimised pcpu access > >>>> using tpidr_el1") and commit 6d99b68933fb ("arm64: alternatives: use > >>>> tpidr_el2 on VHE hosts") use tpidr_elx to cache my_cpu_offset to optimize > >>>> pcpu access. However, when performing reverse execution based on the > >>>> registers and the memory contents in kdump, this information is sometimes > >>>> required if there is a pcpu access. > >>>> > >>>> Signed-off-by: Zhen Lei > >>>> --- > >>>> arch/arm64/kernel/process.c | 5 +++++ > >>>> 1 file changed, 5 insertions(+) > >>>> > >>>> v2 --> v3: > >>>> 1) Relace "switch (read_sysreg(CurrentEL))" statement with > >>>> "if (is_kernel_in_hyp_mode())" statement. > >>>> 2) Change the register name to lowercase. > >>>> > >>>> v1 --> v2: > >>>> Directly print the tpidr_elx register of the current exception level. > >>>> Avoid coupling with the implementation of 'my_cpu_offset'. > >>>> > >>>> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c > >>>> index 7fa97df55e3ad3f..7b6bccce9721c36 100644 > >>>> --- a/arch/arm64/kernel/process.c > >>>> +++ b/arch/arm64/kernel/process.c > >>>> @@ -216,6 +216,11 @@ void __show_regs(struct pt_regs *regs) > >>>> show_regs_print_info(KERN_DEFAULT); > >>>> print_pstate(regs); > >>>> > >>>> + if (is_kernel_in_hyp_mode()) > >>>> + printk("tpidr_el2 : %016llx\n", read_sysreg(tpidr_el2)); > >>>> + else > >>>> + printk("tpidr_el1 : %016llx\n", read_sysreg(tpidr_el1)); > >>> > >>> If we care about the offset specifically, this would be simpler as: > >>> > >>> printk("cpu offset : 0x%016lx\n", __my_cpu_offset()); > >> > >> The function name is __show_regs(), so not using register name may not be good. > >> In fact, some other architectures may also have this problem. If we use my_cpu_offset, > >> we may need to put it in a public. > > > > The other idea is to back up each my_cpu_offset in an array. In this way, the offset can > > be queried through vmcore even if it is not printed. > > Sorry, __per_cpu_offset[NR_CPUS] is always defined. Surely that's in the vmcore already? It's just data in memory. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel