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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id a9-20020a056808128900b00326d2cba5d3sm1020374oiw.8.2022.05.09.14.04.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 May 2022 14:04:27 -0700 (PDT) Received: (nullmailer pid 174170 invoked by uid 1000); Mon, 09 May 2022 21:04:26 -0000 Date: Mon, 9 May 2022 16:04:26 -0500 From: Rob Herring To: Peng Fan Cc: Shawn Guo , "Peng Fan (OSS)" , "krzysztof.kozlowski+dt@linaro.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH V2 1/3] arm64: dts: freescale: Add i.MX93 dtsi support Message-ID: References: <20220503122951.4147636-1-peng.fan@oss.nxp.com> <20220503122951.4147636-2-peng.fan@oss.nxp.com> <20220505084404.GF14615@dragon> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_140431_648323_654EE51C X-CRM114-Status: GOOD ( 18.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, May 07, 2022 at 06:46:16AM +0000, Peng Fan wrote: > > Subject: Re: [PATCH V2 1/3] arm64: dts: freescale: Add i.MX93 dtsi support > > > > On Tue, May 03, 2022 at 08:29:49PM +0800, Peng Fan (OSS) wrote: > > ... > > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi > > > b/arch/arm64/boot/dts/freescale/imx93.dtsi > > > new file mode 100644 > > > index 000000000000..ae8daffe3492 > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi > > > @@ -0,0 +1,337 @@ > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > > +/* > > > + * Copyright 2022 NXP > > > + */ > > > + > > > +#include #include > > > + #include > > > +#include > > > + > > > +#include "imx93-pinfunc.h" > > > + > > > +/ { > > > + interrupt-parent = <&gic>; > > > + #address-cells = <2>; > > > + #size-cells = <2>; > > > + > > > + aliases { > > > + mmc0 = &usdhc1; > > > + mmc1 = &usdhc2; > > > + mmc2 = &usdhc3; > > > + serial0 = &lpuart1; > > > + serial1 = &lpuart2; > > > + serial2 = &lpuart3; > > > + serial3 = &lpuart4; > > > + serial4 = &lpuart5; > > > + serial5 = &lpuart6; > > > + serial6 = &lpuart7; > > > + serial7 = &lpuart8; > > > + }; > > > + > > > + cpus { > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + A55_0: cpu@0 { > > > + device_type = "cpu"; > > > + compatible = "arm,cortex-a55"; > > > + reg = <0x0>; > > > + enable-method = "psci"; > > > + #cooling-cells = <2>; > > > + }; > > > + > > > + A55_1: cpu@100 { > > > + device_type = "cpu"; > > > + compatible = "arm,cortex-a55"; > > > + reg = <0x100>; > > > + enable-method = "psci"; > > > + #cooling-cells = <2>; > > > + }; > > > + > > > + }; > > > + > > > + osc_32k: clock-osc-32k { > > > + compatible = "fixed-clock"; > > > + #clock-cells = <0>; > > > + clock-frequency = <32768>; > > > + clock-output-names = "osc_32k"; > > > + }; > > > + > > > + osc_24m: clock-osc-24m { > > > + compatible = "fixed-clock"; > > > + #clock-cells = <0>; > > > + clock-frequency = <24000000>; > > > + clock-output-names = "osc_24m"; > > > + }; > > > + > > > + clk_ext1: clock-ext1 { > > > + compatible = "fixed-clock"; > > > + #clock-cells = <0>; > > > + clock-frequency = <133000000>; > > > + clock-output-names = "clk_ext1"; > > > + }; > > > + > > > + psci { > > > + compatible = "arm,psci-1.0"; > > > + method = "smc"; > > > + }; > > > + > > > + timer { > > > + compatible = "arm,armv8-timer"; > > > + interrupts = > IRQ_TYPE_LEVEL_LOW)>, > > > + > IRQ_TYPE_LEVEL_LOW)>, > > > + > IRQ_TYPE_LEVEL_LOW)>, > > > + > IRQ_TYPE_LEVEL_LOW)>; > > > + clock-frequency = <24000000>; > > > + arm,no-tick-in-suspend; > > > + interrupt-parent = <&gic>; > > > + }; > > > + > > > + gic: interrupt-controller@48000000 { > > > + compatible = "arm,gic-v3"; > > > + reg = <0 0x48000000 0 0x10000>, > > > + <0 0x48040000 0 0xc0000>; > > > + #interrupt-cells = <3>; > > > + interrupt-controller; > > > + interrupts = ; > > > + interrupt-parent = <&gic>; > > > + }; > > > + > > > + soc@0 { > > > > Why do we need unit-address '@0' here? > > I follow other i.MX dtsi, imx8m[q/m/n/q] all has it. Not a great reason, but yes it is needed. A unit-address should be there if you have 'reg' or 'ranges' and the latter is true here. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel