From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0678EC433EF for ; Tue, 17 May 2022 14:59:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=x1SBtH/G5Oe6BFpsw0YeEYGeG6824uK1osTSxTcn7QY=; b=YY+t4xEDAQ8iIJ VHkjKLHL28WPaUXgs4r1ChGn6l7J3TNmv/LxPYHTYhB1866FiFv8bomJgBPPiPGtacvNQIHhi68Dj 8j+8NwWNQz8yVmD6EfU8Uh0+1ep1gYKOGTsRwYuwmstvC0Zl/mMVcyVo1fCROAaeRyNSEDEDkUlHR aVaOjAA+CvqAhDgnHmrk2Fn1rnLbF5wD+cvHm3kbUxkRvW2A5P0fj2htHjojNlkSp5rk/04VbsCmk u7avM4RIG7Bi6Kh1xIp8erY2NRP6/ytdO7EQZN4ezJ9LZyTCAWM5vYUoU9IfnOqWHBFY/ddxBPY4C meRTJYRT6uWHX13l9pAg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqyer-00EZ5J-Js; Tue, 17 May 2022 14:58:45 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqyep-00EZ4e-E1 for linux-arm-kernel@bombadil.infradead.org; Tue, 17 May 2022 14:58:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=jNDjyd/2NeMNlT18jneGbLlu4XLzS/wrHTJcek5yjQo=; b=Q8dTtlWTVsaMs7cYTI5Tf461dp gpMHAwuOjDsmkjEX2r4TULFErYgJ+PmNhnr+2bLVpzRnuZ6ehwSvdI+sEVEaB6uHHVdC/JJ4rMbw5 XluqNwZJoW4WVT9zXNvxhkq5FzZfb5C7KNE65nwPiZ9mq22ItX05b29wmYxt9R+zMooan/5oPsPLb y/3ThIc2adLYRrza3fJo39wz3OxWh2SspIAcpAupta4mhDMWR3EDGpt+OVtnIMMVv/Z6OSgX0F9Hy glL1RYpYYcryS1bz5RhEbuLgkrXHQFQoxE6RWwpZIYRzGSe3+8xgBlXlzj5Jfr8j5U1qynuqxI0dx Lz4Bin7g==; Received: from [187.19.239.237] (helo=quaco.ghostprotocols.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqyen-00AwVS-IZ; Tue, 17 May 2022 14:58:41 +0000 Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id 19EEC400B1; Tue, 17 May 2022 11:58:38 -0300 (-03) Date: Tue, 17 May 2022 11:58:38 -0300 From: Arnaldo Carvalho de Melo To: James Clark Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, broonie@kernel.org, german.gomez@arm.com, leo.yan@linaro.org, mathieu.poirier@linaro.org, john.garry@huawei.com, Will Deacon , Mike Leach , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 0/2] perf: arm64: Tools support for Dwarf unwinding through SVE functions Message-ID: References: <20220517102005.3022017-1-james.clark@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220517102005.3022017-1-james.clark@arm.com> X-Url: http://acmel.wordpress.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Em Tue, May 17, 2022 at 11:20:01AM +0100, James Clark escreveu: > Changes since v1: > > * Split patchset into kernel side and Perf tool changes Thanks, now I'll wait for the kernel side to be merged. - Arnaldo > When SVE registers are pushed onto the stack the VG register is required to > unwind because the stack offsets would vary by the SVE register width at the > time when the sample was taken. > > The patches ("[PATCH v2 0/2] perf: arm64: Kernel support for Dwarf unwinding > through SVE functions") add support for sampling the VG register to the kernel > and the docs. This is the patchset to add support to userspace perf. > > A small change is also required to libunwind or libdw depending on which > unwinder is used, and these will be published later. Without these changes Perf > continues to work with both libraries, although the VG register is still not > used for unwinding. > > Thanks > James > > James Clark (4): > perf tools: arm64: Copy perf_regs.h from the kernel > perf tools: Use dynamic register set for Dwarf unwind > perf tools: arm64: Decouple Libunwind register names from Perf > perf tools: arm64: Add support for VG register > > tools/arch/arm64/include/uapi/asm/perf_regs.h | 7 +- > tools/perf/arch/arm64/util/perf_regs.c | 34 +++++++++ > tools/perf/arch/arm64/util/unwind-libunwind.c | 73 +------------------ > tools/perf/util/evsel.c | 2 +- > tools/perf/util/perf_regs.c | 2 + > 5 files changed, 45 insertions(+), 73 deletions(-) > > -- > 2.28.0 -- - Arnaldo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel