From: Vinod Koul <vkoul@kernel.org>
To: Amelie Delaunay <amelie.delaunay@foss.st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
dmaengine@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/3] STM32 MDMA IRQ handler code cleaning
Date: Thu, 19 May 2022 23:21:37 +0530 [thread overview]
Message-ID: <YoaDqY4xa/Yq8ECS@matsya> (raw)
In-Reply-To: <20220504155322.121431-1-amelie.delaunay@foss.st.com>
On 04-05-22, 17:53, Amelie Delaunay wrote:
> This patchset cleans stm32-mdma interrupt handler:
> - GISR1 register is not used on any STM32 SoC with MDMA
> - Remove chan wrong initialization
> - Lower the log level to debug instead of warn in case of spurious it
> on stopped channel
Applied, thanks
--
~Vinod
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prev parent reply other threads:[~2022-05-19 17:52 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-04 15:53 [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Amelie Delaunay
2022-05-04 15:53 ` [PATCH 1/3] dmaengine: stm32-mdma: remove GISR1 register Amelie Delaunay
2022-05-04 15:53 ` [PATCH 2/3] dmaengine: stm32-mdma: fix chan initialization in stm32_mdma_irq_handler() Amelie Delaunay
2022-05-04 15:53 ` [PATCH 3/3] dmaengine: stm32-mdma: use dev_dbg on non-busy channel spurious it Amelie Delaunay
2022-05-19 17:51 ` Vinod Koul [this message]
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