From: Mark Rutland <mark.rutland@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 1/9] arm64/sysreg: Generate definitions for CCSIDR2_EL1
Date: Fri, 20 May 2022 15:53:13 +0100 [thread overview]
Message-ID: <YoerWWVIjrNYTVkI@FVFF77S0Q05N> (raw)
In-Reply-To: <20220517182219.2171814-2-broonie@kernel.org>
On Tue, May 17, 2022 at 07:22:11PM +0100, Mark Brown wrote:
> Convert CCSIDR2_EL1 to be automatically generated as per DDI0487H.a. No
> functional change.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
The commit message and title say CCSIDR2_EL1, but the patch changes CCSIDR_EL1
(no '2').
> ---
> arch/arm64/include/asm/sysreg.h | 1 -
> arch/arm64/tools/sysreg | 8 ++++++++
> 2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 91e4f8601393..45d29f34d9b3 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -456,7 +456,6 @@
>
> #define SYS_CNTKCTL_EL1 sys_reg(3, 0, 14, 1, 0)
>
> -#define SYS_CCSIDR_EL1 sys_reg(3, 1, 0, 0, 0)
> #define SYS_CLIDR_EL1 sys_reg(3, 1, 0, 0, 1)
> #define SYS_GMID_EL1 sys_reg(3, 1, 0, 0, 4)
> #define SYS_AIDR_EL1 sys_reg(3, 1, 0, 0, 7)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index a236d7a821b4..db395dabc9e9 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -212,6 +212,14 @@ Sysreg SMCR_EL1 3 0 1 2 6
> Fields SMCR_ELx
> EndSysreg
>
> +Sysreg CCSIDR_EL1 3 1 0 0 0
> +Res0 63:56
> +Field 55:32 NumSets
> +Res0 31:24
> +Field 23:3 Associativity
> +Field 2:0 LineSize
> +EndSysreg
Looking at ARM DDI 0487H.a pages D13-5299 to D13-5301, the layout of CCSIDR_EL1
depends on whether FEAT_CCIDX is implemented:
* When FEAT_CCIDX is implemented:
63:56 RES0
55:32 NumSets
31:24 RES0
23:3 Associativity
2:0 LineSize
* When FEAT_CCIDX is not implemented (e.g. baseline ARMv8.0)
63:32 RES0
31:28 UNKNOWN
27:13 NumSets
12:3 Associativity
2:0 LineSize
The existing code doesn't depend upn the layout, so I agree there's no
functional change.
However, since this patch adds the FEAT_CCIDX layout specifically, I reckon we
need to think about how to capture that fact in the naming.
Thanks,
Mark.
> +
> Sysreg SMIDR_EL1 3 1 0 0 6
> Res0 63:32
> Field 31:24 IMPLEMENTER
> --
> 2.30.2
>
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next prev parent reply other threads:[~2022-05-20 14:54 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-17 18:22 [PATCH v1 0/9] arm64/sysreg: More system register generation Mark Brown
2022-05-17 18:22 ` [PATCH v1 1/9] arm64/sysreg: Generate definitions for CCSIDR2_EL1 Mark Brown
2022-05-20 14:53 ` Mark Rutland [this message]
2022-05-17 18:22 ` [PATCH v1 2/9] arm64/sysreg: Generate definitions for CLIDR_EL1 Mark Brown
2022-05-20 14:56 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 3/9] arm64/sysreg: Generate definitions for CONTEXTIDR_ELx Mark Brown
2022-05-20 15:01 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 4/9] arm64/sysreg: Generate definitions for CPACR_ELx Mark Brown
2022-05-20 15:10 ` Mark Rutland
2022-05-20 15:29 ` Mark Brown
2022-05-17 18:22 ` [PATCH v1 5/9] arm64/sysreg: Generate definitions for CSSELR_EL1 Mark Brown
2022-05-20 15:12 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 6/9] arm64/sysreg: Generate definitions for CTR_EL0 Mark Brown
2022-05-20 15:20 ` Mark Rutland
2022-05-20 15:29 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 7/9] arm64/sysreg: Generate definitions for DACR32_EL2 Mark Brown
2022-05-20 15:22 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 8/9] arm64/sysreg: Generate definitions for DCZID_EL0 Mark Brown
2022-05-20 15:26 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 9/9] arm64/sysreg: Generate definitions for FAR_ELx Mark Brown
2022-05-20 15:32 ` Mark Rutland
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