From: Mark Rutland <mark.rutland@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 5/9] arm64/sysreg: Generate definitions for CSSELR_EL1
Date: Fri, 20 May 2022 16:12:03 +0100 [thread overview]
Message-ID: <Yoevw3MPToUlcOPk@FVFF77S0Q05N> (raw)
In-Reply-To: <20220517182219.2171814-6-broonie@kernel.org>
On Tue, May 17, 2022 at 07:22:15PM +0100, Mark Brown wrote:
> Convert CSSELR_EL1 to automatic generation as per DDI0487H.a, no functional
> change.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> arch/arm64/include/asm/sysreg.h | 2 --
> arch/arm64/tools/sysreg | 7 +++++++
> 2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index c30f5aafde34..6240149f9818 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -461,8 +461,6 @@
> #define SMIDR_EL1_SMPS_SHIFT 15
> #define SMIDR_EL1_AFFINITY_SHIFT 0
>
> -#define SYS_CSSELR_EL1 sys_reg(3, 2, 0, 0, 0)
> -
> #define SYS_CTR_EL0 sys_reg(3, 3, 0, 0, 1)
> #define SYS_DCZID_EL0 sys_reg(3, 3, 0, 0, 7)
>
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 21d5c140fde3..47c4c45d5dc3 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -270,6 +270,13 @@ Res0 14:12
> Field 11:0 AFFINITY
> EndSysreg
>
> +Sysreg CSSELR_EL1 3 2 0 0 0
> +Res0 63:5
> +Field 4 TnD
> +Field 3:1 Level
> +Field 0 InD
> +EndSysreg
These all look right to me per ARM DDI 0487H.a pages D13-5332 to D13-5334:
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Mark.
> +
> Sysreg SVCR 3 3 4 2 2
> Res0 63:2
> Field 1 ZA
> --
> 2.30.2
>
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next prev parent reply other threads:[~2022-05-20 15:13 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-17 18:22 [PATCH v1 0/9] arm64/sysreg: More system register generation Mark Brown
2022-05-17 18:22 ` [PATCH v1 1/9] arm64/sysreg: Generate definitions for CCSIDR2_EL1 Mark Brown
2022-05-20 14:53 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 2/9] arm64/sysreg: Generate definitions for CLIDR_EL1 Mark Brown
2022-05-20 14:56 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 3/9] arm64/sysreg: Generate definitions for CONTEXTIDR_ELx Mark Brown
2022-05-20 15:01 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 4/9] arm64/sysreg: Generate definitions for CPACR_ELx Mark Brown
2022-05-20 15:10 ` Mark Rutland
2022-05-20 15:29 ` Mark Brown
2022-05-17 18:22 ` [PATCH v1 5/9] arm64/sysreg: Generate definitions for CSSELR_EL1 Mark Brown
2022-05-20 15:12 ` Mark Rutland [this message]
2022-05-17 18:22 ` [PATCH v1 6/9] arm64/sysreg: Generate definitions for CTR_EL0 Mark Brown
2022-05-20 15:20 ` Mark Rutland
2022-05-20 15:29 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 7/9] arm64/sysreg: Generate definitions for DACR32_EL2 Mark Brown
2022-05-20 15:22 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 8/9] arm64/sysreg: Generate definitions for DCZID_EL0 Mark Brown
2022-05-20 15:26 ` Mark Rutland
2022-05-17 18:22 ` [PATCH v1 9/9] arm64/sysreg: Generate definitions for FAR_ELx Mark Brown
2022-05-20 15:32 ` Mark Rutland
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