From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4731C433F5 for ; Mon, 23 May 2022 13:17:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6eBhIg8GwTpo3D4Uaxa2DB/9tv3mG6GncMq1n8njE1A=; b=D3vzREOVoHDEo/ nLGhRW+KRQ3c9Hw82HphJqFyC8IrVT+sYcfCn7VsMU3NwnqrOI5jvr1JOwHovtZvzqcc7bhVhx83p 6jzCRfOKl8cJIqzpksEROy+5lJMrTX5FHTtwswrwR7i1byWgrgOegjJKkWMU3sbL+YdSnZFJ2L3RB zGl9U2If07slWuHVSsegb4qrL91CrknSh5mcXLRGam2MyBlmpms1NAjvQKDhCk1F0Wb3C+f6VztI4 UgfVu4Fuu7C2aHmeZzp37tWW3WtBp3wuJnK0ig7vERb9+KtkgyV632KzhwY8gglja1LRC7Fbm76yB KY6yQaYhNYLXDNWZEWDQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nt7uo-004LIB-NE; Mon, 23 May 2022 13:16:06 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nt7um-004LHJ-3r for linux-arm-kernel@bombadil.infradead.org; Mon, 23 May 2022 13:16:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=YG9bXV8FVeQt/Szc7DELTbi14SM9qkBiKQsTuu0TcwQ=; b=pormkH4sBnAP038bdUAdU64Uvp yjXrYgAJIfKGHM0PQiIniM5SlCEOuAWX1En8LQ8GhzBWGxe5rW2ZCcKtAWlt3LsjfkhpdRpcTTGeC OrYN/PyXNkKeaNumEf3hxhjiiaLM3F1hkdUvJVTQcmxfxZ5VxCRgZAgCm9iQmKLiXdm0WGxxE0gf0 PhqCJPfOef2OYUyOMIXsJFCYyDG+xNt4XqlWZOJ6XnPkRr5jVoEspCn97+K48vxEWPbvcGqgRAOy/ nxQ6t3MyafEJJC4ArqfpvFlV2ruHWeLLSL3AURfIPHR0nL6im1mLtis7KFI/N4WQ4ubLBlyBKlX75 upoYYYAA==; Received: from [187.19.239.237] (helo=quaco.ghostprotocols.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1nt7uj-00GAM4-Ka; Mon, 23 May 2022 13:16:02 +0000 Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id 7B4B4400B1; Mon, 23 May 2022 10:15:58 -0300 (-03) Date: Mon, 23 May 2022 10:15:58 -0300 From: Arnaldo Carvalho de Melo To: Nick Forrington Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, John Garry , Will Deacon , James Clark , Mike Leach , Leo Yan , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Kajol Jain , Andi Kleen , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 00/13] perf vendors events arm64: Multiple Arm CPUs Message-ID: References: <20220520181455.340344-1-nick.forrington@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220520181455.340344-1-nick.forrington@arm.com> X-Url: http://acmel.wordpress.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Em Fri, May 20, 2022 at 07:14:42PM +0100, Nick Forrington escreveu: > Add Performance Monitoring Unit event data for the Arm CPUs listed > below. > > Changesets are dependent due to incremental updates to the common events > file and mapfile.csv. > > Data is sourced from https://github.com/ARM-software/data > > Changes since v1: > * No longer includes AArch32-only CPUs [1]. (Subsequent patch contents > * unchanged) Thanks, applied. - Arnaldo > [1]: https://lore.kernel.org/all/2d73146a-86fc-e0d1-11b9-432c7431d58a@huawei.com/ > > Nick Forrington (13): > perf vendors events arm64: Arm Cortex-A34 > perf vendors events arm64: Arm Cortex-A35 > perf vendors events arm64: Arm Cortex-A55 > perf vendors events arm64: Arm Cortex-A510 > perf vendors events arm64: Arm Cortex-A65 > perf vendors events arm64: Arm Cortex-A73 > perf vendors events arm64: Arm Cortex-A75 > perf vendors events arm64: Arm Cortex-A77 > perf vendors events arm64: Arm Cortex-A78 > perf vendors events arm64: Arm Cortex-A710 > perf vendors events arm64: Arm Cortex-X1 > perf vendors events arm64: Arm Cortex-X2 > perf vendors events arm64: Arm Neoverse E1 > > .../arch/arm64/arm/cortex-a34/branch.json | 11 + > .../arch/arm64/arm/cortex-a34/bus.json | 17 ++ > .../arch/arm64/arm/cortex-a34/cache.json | 32 +++ > .../arch/arm64/arm/cortex-a34/exception.json | 14 ++ > .../arm64/arm/cortex-a34/instruction.json | 29 +++ > .../arch/arm64/arm/cortex-a34/memory.json | 8 + > .../arch/arm64/arm/cortex-a35/branch.json | 11 + > .../arch/arm64/arm/cortex-a35/bus.json | 17 ++ > .../arch/arm64/arm/cortex-a35/cache.json | 32 +++ > .../arch/arm64/arm/cortex-a35/exception.json | 14 ++ > .../arm64/arm/cortex-a35/instruction.json | 44 ++++ > .../arch/arm64/arm/cortex-a35/memory.json | 8 + > .../arch/arm64/arm/cortex-a510/branch.json | 59 +++++ > .../arch/arm64/arm/cortex-a510/bus.json | 17 ++ > .../arch/arm64/arm/cortex-a510/cache.json | 182 ++++++++++++++ > .../arch/arm64/arm/cortex-a510/exception.json | 14 ++ > .../arm64/arm/cortex-a510/instruction.json | 95 +++++++ > .../arch/arm64/arm/cortex-a510/memory.json | 32 +++ > .../arch/arm64/arm/cortex-a510/pipeline.json | 107 ++++++++ > .../arch/arm64/arm/cortex-a510/pmu.json | 8 + > .../arch/arm64/arm/cortex-a510/trace.json | 32 +++ > .../arch/arm64/arm/cortex-a55/branch.json | 59 +++++ > .../arch/arm64/arm/cortex-a55/bus.json | 17 ++ > .../arch/arm64/arm/cortex-a55/cache.json | 188 ++++++++++++++ > .../arch/arm64/arm/cortex-a55/exception.json | 20 ++ > .../arm64/arm/cortex-a55/instruction.json | 65 +++++ > .../arch/arm64/arm/cortex-a55/memory.json | 17 ++ > .../arch/arm64/arm/cortex-a55/pipeline.json | 80 ++++++ > .../arch/arm64/arm/cortex-a65/branch.json | 17 ++ > .../arch/arm64/arm/cortex-a65/bus.json | 17 ++ > .../arch/arm64/arm/cortex-a65/cache.json | 236 ++++++++++++++++++ > .../arch/arm64/arm/cortex-a65/dpu.json | 32 +++ > .../arch/arm64/arm/cortex-a65/exception.json | 14 ++ > .../arch/arm64/arm/cortex-a65/ifu.json | 122 +++++++++ > .../arm64/arm/cortex-a65/instruction.json | 71 ++++++ > .../arch/arm64/arm/cortex-a65/memory.json | 35 +++ > .../arch/arm64/arm/cortex-a65/pipeline.json | 8 + > .../arch/arm64/arm/cortex-a710/branch.json | 17 ++ > .../arch/arm64/arm/cortex-a710/bus.json | 20 ++ > .../arch/arm64/arm/cortex-a710/cache.json | 155 ++++++++++++ > .../arch/arm64/arm/cortex-a710/exception.json | 47 ++++ > .../arm64/arm/cortex-a710/instruction.json | 134 ++++++++++ > .../arch/arm64/arm/cortex-a710/memory.json | 41 +++ > .../arch/arm64/arm/cortex-a710/pipeline.json | 23 ++ > .../arch/arm64/arm/cortex-a710/trace.json | 29 +++ > .../arch/arm64/arm/cortex-a73/branch.json | 11 + > .../arch/arm64/arm/cortex-a73/bus.json | 23 ++ > .../arch/arm64/arm/cortex-a73/cache.json | 107 ++++++++ > .../arch/arm64/arm/cortex-a73/etm.json | 14 ++ > .../arch/arm64/arm/cortex-a73/exception.json | 14 ++ > .../arm64/arm/cortex-a73/instruction.json | 65 +++++ > .../arch/arm64/arm/cortex-a73/memory.json | 14 ++ > .../arch/arm64/arm/cortex-a73/mmu.json | 44 ++++ > .../arch/arm64/arm/cortex-a73/pipeline.json | 38 +++ > .../arch/arm64/arm/cortex-a75/branch.json | 11 + > .../arch/arm64/arm/cortex-a75/bus.json | 17 ++ > .../arch/arm64/arm/cortex-a75/cache.json | 164 ++++++++++++ > .../arch/arm64/arm/cortex-a75/etm.json | 14 ++ > .../arch/arm64/arm/cortex-a75/exception.json | 17 ++ > .../arm64/arm/cortex-a75/instruction.json | 74 ++++++ > .../arch/arm64/arm/cortex-a75/memory.json | 17 ++ > .../arch/arm64/arm/cortex-a75/mmu.json | 44 ++++ > .../arch/arm64/arm/cortex-a75/pipeline.json | 44 ++++ > .../arch/arm64/arm/cortex-a77/branch.json | 17 ++ > .../arch/arm64/arm/cortex-a77/bus.json | 17 ++ > .../arch/arm64/arm/cortex-a77/cache.json | 143 +++++++++++ > .../arch/arm64/arm/cortex-a77/exception.json | 47 ++++ > .../arm64/arm/cortex-a77/instruction.json | 77 ++++++ > .../arch/arm64/arm/cortex-a77/memory.json | 23 ++ > .../arch/arm64/arm/cortex-a77/pipeline.json | 8 + > .../arch/arm64/arm/cortex-a78/branch.json | 17 ++ > .../arch/arm64/arm/cortex-a78/bus.json | 20 ++ > .../arch/arm64/arm/cortex-a78/cache.json | 155 ++++++++++++ > .../arch/arm64/arm/cortex-a78/exception.json | 47 ++++ > .../arm64/arm/cortex-a78/instruction.json | 80 ++++++ > .../arch/arm64/arm/cortex-a78/memory.json | 23 ++ > .../arch/arm64/arm/cortex-a78/pipeline.json | 23 ++ > .../arch/arm64/arm/cortex-x1/branch.json | 17 ++ > .../arch/arm64/arm/cortex-x1/bus.json | 20 ++ > .../arch/arm64/arm/cortex-x1/cache.json | 155 ++++++++++++ > .../arch/arm64/arm/cortex-x1/exception.json | 47 ++++ > .../arch/arm64/arm/cortex-x1/instruction.json | 80 ++++++ > .../arch/arm64/arm/cortex-x1/memory.json | 23 ++ > .../arch/arm64/arm/cortex-x1/pipeline.json | 23 ++ > .../arch/arm64/arm/cortex-x2/branch.json | 17 ++ > .../arch/arm64/arm/cortex-x2/bus.json | 20 ++ > .../arch/arm64/arm/cortex-x2/cache.json | 155 ++++++++++++ > .../arch/arm64/arm/cortex-x2/exception.json | 47 ++++ > .../arch/arm64/arm/cortex-x2/instruction.json | 134 ++++++++++ > .../arch/arm64/arm/cortex-x2/memory.json | 41 +++ > .../arch/arm64/arm/cortex-x2/pipeline.json | 23 ++ > .../arch/arm64/arm/cortex-x2/trace.json | 29 +++ > .../arch/arm64/arm/neoverse-e1/branch.json | 17 ++ > .../arch/arm64/arm/neoverse-e1/bus.json | 17 ++ > .../arch/arm64/arm/neoverse-e1/cache.json | 107 ++++++++ > .../arch/arm64/arm/neoverse-e1/exception.json | 14 ++ > .../arm64/arm/neoverse-e1/instruction.json | 65 +++++ > .../arch/arm64/arm/neoverse-e1/memory.json | 23 ++ > .../arch/arm64/arm/neoverse-e1/pipeline.json | 8 + > .../arch/arm64/arm/neoverse-e1/spe.json | 14 ++ > .../arch/arm64/common-and-microarch.json | 66 +++++ > tools/perf/pmu-events/arch/arm64/mapfile.csv | 13 + > 102 files changed, 4851 insertions(+) > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a34/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a34/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a34/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a34/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a34/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a34/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a35/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a35/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a35/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a35/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a35/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a35/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/trace.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a55/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a55/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a55/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a55/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a55/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a55/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a55/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/dpu.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/ifu.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a65/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a710/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a710/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a710/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a710/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a710/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a710/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a710/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a710/trace.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/etm.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/mmu.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a73/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/etm.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/mmu.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a75/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a77/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a77/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a77/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a77/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a77/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a77/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a77/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a78/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a78/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a78/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a78/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a78/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a78/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a78/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x1/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x1/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x1/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x1/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x1/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x1/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x1/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x2/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x2/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x2/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x2/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x2/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x2/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x2/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-x2/trace.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-e1/branch.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-e1/bus.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-e1/cache.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-e1/exception.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-e1/instruction.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-e1/memory.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-e1/pipeline.json > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-e1/spe.json > > -- > 2.25.1 -- - Arnaldo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org 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