[PATCH 0/7] clk: imx93: pll/imx93 fixes and update

[PATCH 0/7] clk: imx93: pll/imx93 fixes and update

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

This patchset covers a few Fixes to pll and i.mx93 clk, also includes
one patch to update pll freq.

Haibo Chen (1):
  clk: imx93: use adc_root as the parent clock of adc1

Jacky Bai (1):
  clk: imx93: Correct the edma1's parent clock

Liu Ying (1):
  clk: imx: clk-fracn-gppll: Return rate in rate table properly in
    ->recalc_rate()

Peng Fan (4):
  clk: imx93: correct nic_media parent
  clk: imx: clk-fracn-gppll: fix mfd value
  clk: imx: clk-fracn-gppll: correct rdiv
  clk: imx: clk-fracn-gppll: Add more freq config for video pll

 drivers/clk/imx/clk-fracn-gppll.c | 36 ++++++++++++++++++-------------
 drivers/clk/imx/clk-imx93.c       |  6 +++---
 2 files changed, 24 insertions(+), 18 deletions(-)

-- 
2.25.1


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[PATCH 1/7] clk: imx93: use adc_root as the parent clock of adc1

[Peng Fan (OSS)]

From: Haibo Chen <haibo.chen@nxp.com>

When debug, find after system boot up, all adc register operation
will trigger system hang, this is because the internal adc ipg
clock is gate off. In dts, only reference the IMX93_CLK_ADC1_GATE,
which is adc1, no one touch the adc_root, so adc_root will be gate
off automatically after system boot up.

Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk")
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx93.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index edcc87661d1f..172cd56c9610 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -150,7 +150,7 @@ static const struct imx93_clk_ccgr {
 	{ IMX93_CLK_A55_GATE,		"a55",		"a55_root",		0x8000, },
 	/* M33 critical clk for system run */
 	{ IMX93_CLK_CM33_GATE,		"cm33",		"m33_root",		0x8040, CLK_IS_CRITICAL },
-	{ IMX93_CLK_ADC1_GATE,		"adc1",		"osc_24m",		0x82c0, },
+	{ IMX93_CLK_ADC1_GATE,		"adc1",		"adc_root",		0x82c0, },
 	{ IMX93_CLK_WDOG1_GATE,		"wdog1",	"osc_24m",		0x8300, },
 	{ IMX93_CLK_WDOG2_GATE,		"wdog2",	"osc_24m",		0x8340, },
 	{ IMX93_CLK_WDOG3_GATE,		"wdog3",	"osc_24m",		0x8380, },
-- 
2.25.1


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[PATCH 2/7] clk: imx93: correct nic_media parent

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

NIC_MEDIA sources from media_axi_root, not media_apb_root.

Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx93.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index 172cd56c9610..26885bd3971c 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -219,7 +219,7 @@ static const struct imx93_clk_ccgr {
 	{ IMX93_CLK_LCDIF_GATE,		"lcdif",	"media_apb_root",	0x9640, },
 	{ IMX93_CLK_PXP_GATE,		"pxp",		"media_apb_root",	0x9680, },
 	{ IMX93_CLK_ISI_GATE,		"isi",		"media_apb_root",	0x96c0, },
-	{ IMX93_CLK_NIC_MEDIA_GATE,	"nic_media",	"media_apb_root",	0x9700, },
+	{ IMX93_CLK_NIC_MEDIA_GATE,	"nic_media",	"media_axi_root",	0x9700, },
 	{ IMX93_CLK_USB_CONTROLLER_GATE, "usb_controller", "hsio_root",		0x9a00, },
 	{ IMX93_CLK_USB_TEST_60M_GATE,	"usb_test_60m",	"hsio_usb_test_60m_root", 0x9a40, },
 	{ IMX93_CLK_HSIO_TROUT_24M_GATE, "hsio_trout_24m", "osc_24m",		0x9a80, },
-- 
2.25.1


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[PATCH 3/7] clk: imx93: Correct the edma1's parent clock

[Peng Fan (OSS)]

From: Jacky Bai <ping.bai@nxp.com>

For EDMA1 in AONMIX, its parent clock should be from cm33_root,
so Correct it.

Fixes: 24defbe194b65("clk: imx: add i.MX93 clk")
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx93.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index 26885bd3971c..f5c9fa40491c 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -160,7 +160,7 @@ static const struct imx93_clk_ccgr {
 	{ IMX93_CLK_SEMA2_GATE,		"sema2",	"bus_wakeup_root",	0x8480, },
 	{ IMX93_CLK_MU_A_GATE,		"mu_a",		"bus_aon_root",		0x84c0, },
 	{ IMX93_CLK_MU_B_GATE,		"mu_b",		"bus_aon_root",		0x8500, },
-	{ IMX93_CLK_EDMA1_GATE,		"edma1",	"wakeup_axi_root",	0x8540, },
+	{ IMX93_CLK_EDMA1_GATE,		"edma1",	"m33_root",		0x8540, },
 	{ IMX93_CLK_EDMA2_GATE,		"edma2",	"wakeup_axi_root",	0x8580, },
 	{ IMX93_CLK_FLEXSPI1_GATE,	"flexspi",	"flexspi_root",		0x8640, },
 	{ IMX93_CLK_GPIO1_GATE,		"gpio1",	"m33_root",		0x8880, },
-- 
2.25.1


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[PATCH 4/7] clk: imx: clk-fracn-gppll: fix mfd value

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

According to spec:
A value of 0 is disallowed and should not be programmed in this register

Fix to 1.

Fixes: 1b26cb8a77a4 ("clk: imx: support fracn gppll")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-fracn-gppll.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 71c102d950ab..36a53c60e71f 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -64,10 +64,10 @@ struct clk_fracn_gppll {
  * Fout = Fvco / (rdiv * odiv)
  */
 static const struct imx_fracn_gppll_rate_table fracn_tbl[] = {
-	PLL_FRACN_GP(650000000U, 81, 0, 0, 0, 3),
-	PLL_FRACN_GP(594000000U, 198, 0, 0, 0, 8),
-	PLL_FRACN_GP(560000000U, 70, 0, 0, 0, 3),
-	PLL_FRACN_GP(400000000U, 50, 0, 0, 0, 3),
+	PLL_FRACN_GP(650000000U, 81, 0, 1, 0, 3),
+	PLL_FRACN_GP(594000000U, 198, 0, 1, 0, 8),
+	PLL_FRACN_GP(560000000U, 70, 0, 1, 0, 3),
+	PLL_FRACN_GP(400000000U, 50, 0, 1, 0, 3),
 	PLL_FRACN_GP(393216000U, 81, 92, 100, 0, 5)
 };
 
-- 
2.25.1


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[PATCH 5/7] clk: imx: clk-fracn-gppll: Return rate in rate table properly in ->recalc_rate()

[Peng Fan (OSS)]

From: Liu Ying <victor.liu@nxp.com>

The PLL parameters in rate table should be directly compared with
those read from PLL registers instead of the cooked ones.

Fixes: 1b26cb8a77a4 ("clk: imx: support fracn gppll")
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
 drivers/clk/imx/clk-fracn-gppll.c | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 36a53c60e71f..cb06b0045e9e 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -131,18 +131,7 @@ static unsigned long clk_fracn_gppll_recalc_rate(struct clk_hw *hw, unsigned lon
 	mfi = FIELD_GET(PLL_MFI_MASK, pll_div);
 
 	rdiv = FIELD_GET(PLL_RDIV_MASK, pll_div);
-	rdiv = rdiv + 1;
 	odiv = FIELD_GET(PLL_ODIV_MASK, pll_div);
-	switch (odiv) {
-	case 0:
-		odiv = 2;
-		break;
-	case 1:
-		odiv = 3;
-		break;
-	default:
-		break;
-	}
 
 	/*
 	 * Sometimes, the recalculated rate has deviation due to
@@ -160,6 +149,19 @@ static unsigned long clk_fracn_gppll_recalc_rate(struct clk_hw *hw, unsigned lon
 	if (rate)
 		return (unsigned long)rate;
 
+	rdiv = rdiv + 1;
+
+	switch (odiv) {
+	case 0:
+		odiv = 2;
+		break;
+	case 1:
+		odiv = 3;
+		break;
+	default:
+		break;
+	}
+
 	/* Fvco = Fref * (MFI + MFN / MFD) */
 	fvco = fvco * mfi * mfd + fvco * mfn;
 	do_div(fvco, mfd * rdiv * odiv);
-- 
2.25.1


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[PATCH 6/7] clk: imx: clk-fracn-gppll: correct rdiv

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

According to Reference Manual:
 000b - Divide by 1
 001b - Divide by 1
 010b - Divide by 2
 011b - Divide by 3
 100b - Divide by 4
 101b - Divide by 5
 110b - Divide by 6
 111b - Divide by 7

So only need increase rdiv by 1 when the register value is 0.

Fixes: 1b26cb8a77a4 ("clk: imx: support fracn gppll")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-fracn-gppll.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index cb06b0045e9e..025b73229cdd 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -149,7 +149,8 @@ static unsigned long clk_fracn_gppll_recalc_rate(struct clk_hw *hw, unsigned lon
 	if (rate)
 		return (unsigned long)rate;
 
-	rdiv = rdiv + 1;
+	if (!rdiv)
+		rdiv = rdiv + 1;
 
 	switch (odiv) {
 	case 0:
-- 
2.25.1


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[PATCH 7/7] clk: imx: clk-fracn-gppll: Add more freq config for video pll

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add the [484,498,445.3]MHz frequency support that will be used
by video subsystem on imx93.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-fracn-gppll.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 025b73229cdd..a2aaa14fc1ae 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -67,6 +67,9 @@ static const struct imx_fracn_gppll_rate_table fracn_tbl[] = {
 	PLL_FRACN_GP(650000000U, 81, 0, 1, 0, 3),
 	PLL_FRACN_GP(594000000U, 198, 0, 1, 0, 8),
 	PLL_FRACN_GP(560000000U, 70, 0, 1, 0, 3),
+	PLL_FRACN_GP(498000000U, 83, 0, 1, 0, 4),
+	PLL_FRACN_GP(484000000U, 121, 0, 1, 0, 6),
+	PLL_FRACN_GP(445333333U, 167, 0, 1, 0, 9),
 	PLL_FRACN_GP(400000000U, 50, 0, 1, 0, 3),
 	PLL_FRACN_GP(393216000U, 81, 92, 100, 0, 5)
 };
-- 
2.25.1


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Re: [PATCH 1/7] clk: imx93: use adc_root as the parent clock of adc1

[Abel Vesa]

On 22-06-09 21:28:56, Peng Fan (OSS) wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
>
> When debug, find after system boot up, all adc register operation
> will trigger system hang, this is because the internal adc ipg
> clock is gate off. In dts, only reference the IMX93_CLK_ADC1_GATE,
> which is adc1, no one touch the adc_root, so adc_root will be gate
> off automatically after system boot up.
>
> Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk")
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Reviewed-by: Abel Vesa <abel.vesa@linaro.org>

> ---
>  drivers/clk/imx/clk-imx93.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
> index edcc87661d1f..172cd56c9610 100644
> --- a/drivers/clk/imx/clk-imx93.c
> +++ b/drivers/clk/imx/clk-imx93.c
> @@ -150,7 +150,7 @@ static const struct imx93_clk_ccgr {
>  	{ IMX93_CLK_A55_GATE,		"a55",		"a55_root",		0x8000, },
>  	/* M33 critical clk for system run */
>  	{ IMX93_CLK_CM33_GATE,		"cm33",		"m33_root",		0x8040, CLK_IS_CRITICAL },
> -	{ IMX93_CLK_ADC1_GATE,		"adc1",		"osc_24m",		0x82c0, },
> +	{ IMX93_CLK_ADC1_GATE,		"adc1",		"adc_root",		0x82c0, },
>  	{ IMX93_CLK_WDOG1_GATE,		"wdog1",	"osc_24m",		0x8300, },
>  	{ IMX93_CLK_WDOG2_GATE,		"wdog2",	"osc_24m",		0x8340, },
>  	{ IMX93_CLK_WDOG3_GATE,		"wdog3",	"osc_24m",		0x8380, },
> --
> 2.25.1
>

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Re: [PATCH 2/7] clk: imx93: correct nic_media parent

[Abel Vesa]

On 22-06-09 21:28:57, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> NIC_MEDIA sources from media_axi_root, not media_apb_root.
>
> Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk")
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Reviewed-by: Abel Vesa <abel.vesa@linaro.org>

> ---
>  drivers/clk/imx/clk-imx93.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
> index 172cd56c9610..26885bd3971c 100644
> --- a/drivers/clk/imx/clk-imx93.c
> +++ b/drivers/clk/imx/clk-imx93.c
> @@ -219,7 +219,7 @@ static const struct imx93_clk_ccgr {
>  	{ IMX93_CLK_LCDIF_GATE,		"lcdif",	"media_apb_root",	0x9640, },
>  	{ IMX93_CLK_PXP_GATE,		"pxp",		"media_apb_root",	0x9680, },
>  	{ IMX93_CLK_ISI_GATE,		"isi",		"media_apb_root",	0x96c0, },
> -	{ IMX93_CLK_NIC_MEDIA_GATE,	"nic_media",	"media_apb_root",	0x9700, },
> +	{ IMX93_CLK_NIC_MEDIA_GATE,	"nic_media",	"media_axi_root",	0x9700, },
>  	{ IMX93_CLK_USB_CONTROLLER_GATE, "usb_controller", "hsio_root",		0x9a00, },
>  	{ IMX93_CLK_USB_TEST_60M_GATE,	"usb_test_60m",	"hsio_usb_test_60m_root", 0x9a40, },
>  	{ IMX93_CLK_HSIO_TROUT_24M_GATE, "hsio_trout_24m", "osc_24m",		0x9a80, },
> --
> 2.25.1
>

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Re: [PATCH 3/7] clk: imx93: Correct the edma1's parent clock

[Abel Vesa]

On 22-06-09 21:28:58, Peng Fan (OSS) wrote:
> From: Jacky Bai <ping.bai@nxp.com>
>
> For EDMA1 in AONMIX, its parent clock should be from cm33_root,
> so Correct it.
>
> Fixes: 24defbe194b65("clk: imx: add i.MX93 clk")
> Reviewed-by: Peng Fan <peng.fan@nxp.com>

The reviews done internally do no count in upstream.
I think that's the rule. So drop the R-b tags from all patches.
Keep only the S-o-b tags.

With that fixed, you can add:

Reviewed-by: Abel Vesa <abel.vesa@linaro.org>

> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/clk/imx/clk-imx93.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
> index 26885bd3971c..f5c9fa40491c 100644
> --- a/drivers/clk/imx/clk-imx93.c
> +++ b/drivers/clk/imx/clk-imx93.c
> @@ -160,7 +160,7 @@ static const struct imx93_clk_ccgr {
>  	{ IMX93_CLK_SEMA2_GATE,		"sema2",	"bus_wakeup_root",	0x8480, },
>  	{ IMX93_CLK_MU_A_GATE,		"mu_a",		"bus_aon_root",		0x84c0, },
>  	{ IMX93_CLK_MU_B_GATE,		"mu_b",		"bus_aon_root",		0x8500, },
> -	{ IMX93_CLK_EDMA1_GATE,		"edma1",	"wakeup_axi_root",	0x8540, },
> +	{ IMX93_CLK_EDMA1_GATE,		"edma1",	"m33_root",		0x8540, },
>  	{ IMX93_CLK_EDMA2_GATE,		"edma2",	"wakeup_axi_root",	0x8580, },
>  	{ IMX93_CLK_FLEXSPI1_GATE,	"flexspi",	"flexspi_root",		0x8640, },
>  	{ IMX93_CLK_GPIO1_GATE,		"gpio1",	"m33_root",		0x8880, },
> --
> 2.25.1
>

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Re: [PATCH 3/7] clk: imx93: Correct the edma1's parent clock

[Stephen Boyd]

Quoting Abel Vesa (2022-06-15 14:39:27)
> On 22-06-09 21:28:58, Peng Fan (OSS) wrote:
> > From: Jacky Bai <ping.bai@nxp.com>
> >
> > For EDMA1 in AONMIX, its parent clock should be from cm33_root,
> > so Correct it.
> >
> > Fixes: 24defbe194b65("clk: imx: add i.MX93 clk")
> > Reviewed-by: Peng Fan <peng.fan@nxp.com>
> 
> The reviews done internally do no count in upstream.
> I think that's the rule. So drop the R-b tags from all patches.
> Keep only the S-o-b tags.

Is it any different code from what is sent upstream here? If not any
different then I don't think anything is stopping the review tags from
being kept.

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RE: [PATCH 3/7] clk: imx93: Correct the edma1's parent clock

[Peng Fan]

> Subject: Re: [PATCH 3/7] clk: imx93: Correct the edma1's parent clock
> 
> Quoting Abel Vesa (2022-06-15 14:39:27)
> > On 22-06-09 21:28:58, Peng Fan (OSS) wrote:
> > > From: Jacky Bai <ping.bai@nxp.com>
> > >
> > > For EDMA1 in AONMIX, its parent clock should be from cm33_root, so
> > > Correct it.
> > >
> > > Fixes: 24defbe194b65("clk: imx: add i.MX93 clk")
> > > Reviewed-by: Peng Fan <peng.fan@nxp.com>
> >
> > The reviews done internally do no count in upstream.
> > I think that's the rule. So drop the R-b tags from all patches.
> > Keep only the S-o-b tags.
> 
> Is it any different code from what is sent upstream here? If not any different
> then I don't think anything is stopping the review tags from being kept.

There is no difference, I directly cherry-pick downstream patch to upstream,
with only a very minor subject change, dropping the JIRA ticket number.

Thanks,
Peng.
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Re: [PATCH 3/7] clk: imx93: Correct the edma1's parent clock

[Abel Vesa]

On 22-06-16 03:58:10, Peng Fan wrote:
> > Subject: Re: [PATCH 3/7] clk: imx93: Correct the edma1's parent clock
> >
> > Quoting Abel Vesa (2022-06-15 14:39:27)
> > > On 22-06-09 21:28:58, Peng Fan (OSS) wrote:
> > > > From: Jacky Bai <ping.bai@nxp.com>
> > > >
> > > > For EDMA1 in AONMIX, its parent clock should be from cm33_root, so
> > > > Correct it.
> > > >
> > > > Fixes: 24defbe194b65("clk: imx: add i.MX93 clk")
> > > > Reviewed-by: Peng Fan <peng.fan@nxp.com>
> > >
> > > The reviews done internally do no count in upstream.
> > > I think that's the rule. So drop the R-b tags from all patches.
> > > Keep only the S-o-b tags.
> >
> > Is it any different code from what is sent upstream here? If not any different
> > then I don't think anything is stopping the review tags from being kept.
>
> There is no difference, I directly cherry-pick downstream patch to upstream,
> with only a very minor subject change, dropping the JIRA ticket number.
>

Sounds good to me then. I'll apply it now. Thanks.

> Thanks,
> Peng.

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Re: [PATCH 0/7] clk: imx93: pll/imx93 fixes and update

[Abel Vesa]

On 22-06-09 21:28:55, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> This patchset covers a few Fixes to pll and i.mx93 clk, also includes
> one patch to update pll freq.
>

Applied all, thanks.

> Haibo Chen (1):
>   clk: imx93: use adc_root as the parent clock of adc1
>
> Jacky Bai (1):
>   clk: imx93: Correct the edma1's parent clock
>
> Liu Ying (1):
>   clk: imx: clk-fracn-gppll: Return rate in rate table properly in
>     ->recalc_rate()
>
> Peng Fan (4):
>   clk: imx93: correct nic_media parent
>   clk: imx: clk-fracn-gppll: fix mfd value
>   clk: imx: clk-fracn-gppll: correct rdiv
>   clk: imx: clk-fracn-gppll: Add more freq config for video pll
>
>  drivers/clk/imx/clk-fracn-gppll.c | 36 ++++++++++++++++++-------------
>  drivers/clk/imx/clk-imx93.c       |  6 +++---
>  2 files changed, 24 insertions(+), 18 deletions(-)
>
> --
> 2.25.1
>

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