From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2B5BFC433EF for ; Fri, 1 Jul 2022 16:30:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2gNwKtlXDjvTmva08coJDfzLO11QzyptiFyMS4neMXg=; b=ND0AqeAAyyJuwf 2v93lFZmw9NGXJerBwwBeYwpiWxQl9Hy0QoKZN2PbkCtYdsJ1WyynmVPNneQ2b+JCE/xocdGd3u9Q z9/sxr+W2oqBrOvgvSZFd46duDFaUrM/ai8wEZ9ba45iq60Y4VX8OGjWYIvGvnICYJF97jtL0fuk6 FHZWaP5Z5RtdMo72WvxGnzdx2DIwfwnaJGvpe4ME2RAy2G7cee90u01IzGAgVb+x5cVYm/aXzSSsH fPnp5E0UmAdMDIDFW8bTt4a4vFoZ5hjeuS8ZtVmHzhobN0pkcAsy5bONafFnk+sJSm0R1iVTv1Dre vJJUePjcmZuNI5Pa8YsQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o7JVu-005yph-DV; Fri, 01 Jul 2022 16:29:02 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o7JVn-005yhm-3Q for linux-arm-kernel@lists.infradead.org; Fri, 01 Jul 2022 16:28:58 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C26E46255B; Fri, 1 Jul 2022 16:28:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 862EAC341CD; Fri, 1 Jul 2022 16:28:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656692928; bh=R8iGcJ/q4R9xa0G3mQb3hMxAlVQoBfF30z8+ZZkTAVE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=k7nnHPKmQ78xkG3MaFecuBEPoBXG6f1Qg+E/PH1vsnn06xDko5MYwE/leoTqSTj6i ozFze5Roamqux+noCahHYLuuH9rJfaTqgnc5i6FAEB9TPAubzHygIm34XiUvhbLl78 bzxHUScSbhLaskc3vVwcQclgIqvnK4IFX02CtgYjHTOu/+XEmVxHG6jc6DHBIP0PQa jJrXCiDz1jxCeHnOPd0tYnfZCYA7a+xhZrq/SVs+xrd/9BH2uVaGfcVI2A6jcVH+/4 cjb/ePzIPQvTKnkugwYZn9XoF1uMjgCNUKTxGoy9UN/TQ5/1GYzrEs4w+JPzubZUFq IESuBzxGTCZKg== Date: Fri, 1 Jul 2022 21:58:43 +0530 From: Vinod Koul To: Samuel Holland Cc: Chen-Yu Tsai , Jernej Skrabec , Maxime Ripard , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: Re: [PATCH] dmaengine: sun4i: Set the maximum segment size Message-ID: References: <20220621031350.36187-1-samuel@sholland.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220621031350.36187-1-samuel@sholland.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220701_092855_273967_B1139B1E X-CRM114-Status: GOOD ( 32.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 20-06-22, 22:13, Samuel Holland wrote: > The sun4i DMA engine supports transfer sizes up to 128k for normal DMA > and 16M for dedicated DMA, as documented in the A10 and A20 manuals. > > Since this is larger than the default segment size limit (64k), exposing > the real limit reduces the number of transfers needed for a transaction. > However, because the device can only report one segment size limit, we > have to expose the smaller limit from normal DMA. > > One complication is that the driver combines pairs of periodic transfers > to reduce programming overhead. This only works when the period size is > at most half of the maximum transfer size. With the default 64k segment > size limit, this was always the case, but for normal DMA it is no longer > guaranteed. Skip the optimization if the period is too long; even > without it, the overhead is less than before. > > Signed-off-by: Samuel Holland > --- > I don't have any A10 or A20 boards I can test this on. > > drivers/dma/sun4i-dma.c | 32 +++++++++++++++++++++++++++----- > 1 file changed, 27 insertions(+), 5 deletions(-) > > diff --git a/drivers/dma/sun4i-dma.c b/drivers/dma/sun4i-dma.c > index 93f1645ae928..f291b1b4db32 100644 > --- a/drivers/dma/sun4i-dma.c > +++ b/drivers/dma/sun4i-dma.c > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -122,6 +123,15 @@ > SUN4I_DDMA_PARA_DST_WAIT_CYCLES(2) | \ > SUN4I_DDMA_PARA_SRC_WAIT_CYCLES(2)) > > +/* > + * Normal DMA supports individual transfers (segments) up to 128k. > + * Dedicated DMA supports transfers up to 16M. We can only report > + * one size limit, so we have to use the smaller value. > + */ > +#define SUN4I_NDMA_MAX_SEG_SIZE SZ_128K > +#define SUN4I_DDMA_MAX_SEG_SIZE SZ_16M This new define is not used, so why add? > +#define SUN4I_DMA_MAX_SEG_SIZE SUN4I_NDMA_MAX_SEG_SIZE > + > struct sun4i_dma_pchan { > /* Register base of channel */ > void __iomem *base; > @@ -155,7 +165,8 @@ struct sun4i_dma_contract { > struct virt_dma_desc vd; > struct list_head demands; > struct list_head completed_demands; > - int is_cyclic; > + bool is_cyclic : 1; > + bool use_half_int : 1; > }; > > struct sun4i_dma_dev { > @@ -372,7 +383,7 @@ static int __execute_vchan_pending(struct sun4i_dma_dev *priv, > if (promise) { > vchan->contract = contract; > vchan->pchan = pchan; > - set_pchan_interrupt(priv, pchan, contract->is_cyclic, 1); > + set_pchan_interrupt(priv, pchan, contract->use_half_int, 1); not interrupt when cyclic? > configure_pchan(pchan, promise); > } > > @@ -735,12 +746,21 @@ sun4i_dma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf, size_t len, > * > * Which requires half the engine programming for the same > * functionality. > + * > + * This only works if two periods fit in a single promise. That will > + * always be the case for dedicated DMA, where the hardware has a much > + * larger maximum transfer size than advertised to clients. > */ > - nr_periods = DIV_ROUND_UP(len / period_len, 2); > + if (vchan->is_dedicated || period_len <= SUN4I_NDMA_MAX_SEG_SIZE / 2) { > + period_len *= 2; > + contract->use_half_int = 1; > + } > + > + nr_periods = DIV_ROUND_UP(len, period_len); > for (i = 0; i < nr_periods; i++) { > /* Calculate the offset in the buffer and the length needed */ > - offset = i * period_len * 2; > - plength = min((len - offset), (period_len * 2)); > + offset = i * period_len; > + plength = min((len - offset), period_len); > if (dir == DMA_MEM_TO_DEV) > src = buf + offset; > else > @@ -1149,6 +1169,8 @@ static int sun4i_dma_probe(struct platform_device *pdev) > platform_set_drvdata(pdev, priv); > spin_lock_init(&priv->lock); > > + dma_set_max_seg_size(&pdev->dev, SUN4I_DMA_MAX_SEG_SIZE); > + > dma_cap_zero(priv->slave.cap_mask); > dma_cap_set(DMA_PRIVATE, priv->slave.cap_mask); > dma_cap_set(DMA_MEMCPY, priv->slave.cap_mask); > -- > 2.35.1 -- ~Vinod _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel