From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B299EC43334 for ; Tue, 21 Jun 2022 09:07:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1tcrjloSKiZ1/kW6wro67Nj90Ne5pXedtSqJHEkQ2UA=; b=gLWc5oUmYFYe4k gXd/5u+8kEpgFo1uP2DGxvvsmeSeeCkB9ulJsgGGgLYtN8SJxukK7j5Y25W3B66UxVSSTZrfm1q3V 6LVEpnyXrN7bYd1ScMyD83F6MU0p7nQNAj/GKYgOt/JbOhvnDTnbj0BCHVlK5j5akd0lqjg9ID2sg zVSTBIAgXx4L+pmo0HWXdhvi9NeEa6P8tm7IF0fD0SHV6Kk/BjLCu9E16ilNTHjf7MZTPykrpCrHL +YjDAh9bJQRwvMIqmiFc/bqowXvkiWM5EV18XNZrdiIxtJGiIeQ04R3IIFDC02LH11BtHR2JcFuZr p4+A4SKJAXbDgqfCGQww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o3Zph-004W8F-GM; Tue, 21 Jun 2022 09:06:02 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o3ZpU-004W3g-ST for linux-arm-kernel@lists.infradead.org; Tue, 21 Jun 2022 09:05:50 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 4D02FB81686; Tue, 21 Jun 2022 09:05:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EFCC8C3411D; Tue, 21 Jun 2022 09:05:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655802346; bh=7mNxfcNU8Owcc0AruDgkcVQfuiIuDtolzMAIpwihElE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=McOtBZ5BOzquTU+uRqVBdyq0Uf0OQj6hZqIPYEh7ZhqvU7Z2Yi/iNUlryqmKBuEIy eTGa5ry0yUKo74jHsBV3jt617yUGDMbplA2kZXg90E8zoTC0z8DgHZ5IdLa+FaRzMd y9oeQTVv/o46NQuGj1n7RMV8uNoknIZGYcd+sdgVvQZYnmR2oc3/T3VLEThqDdCjGk w3puGa/9PMRYayTsBtZQ4VOlxLSWpe12/Ex42/x6e5zXTojekfeILFRIbJVCZsXLpX 3rNDpwIPnrDl59+JsBG1Im8Km4zGL498/7vOE+jrvZbz1POnaaksIswa2teWzMqRdq Zpl24EzQqrviA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o3ZpL-0001fY-OQ; Tue, 21 Jun 2022 11:05:39 +0200 Date: Tue, 21 Jun 2022 11:05:39 +0200 From: Johan Hovold To: Baruch Siach Cc: Andy Gross , Bjorn Andersson , Stanimir Varbanov , Selvam Sathappan Periakaruppan , Rob Herring , Robert Marko , Baruch Siach , Kathiravan T , Bjorn Helgaas , Rob Herring , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel , Bryan O'Donoghue , Pali =?utf-8?B?Um9ow6Fy?= , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org Subject: Re: [PATCH v8 3/3] PCI: qcom: Add IPQ60xx support Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220621_020549_220944_C5AE484C X-CRM114-Status: GOOD ( 13.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 21, 2022 at 11:54:54AM +0300, Baruch Siach wrote: > From: Selvam Sathappan Periakaruppan > > IPQ60xx series of SoCs have one port of PCIe gen 3. Add support for that > platform. > > The code is based on downstream[1] Codeaurora kernel v5.4 (branch > win.linuxopenwrt.2.0). > > Split out the DBI registers access part from .init into .post_init. DBI > registers are only accessible after phy_power_on(). > > [1] https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-ipq-5.4/ > > Reviewed-by: Rob Herring > Acked-by: Stanimir Varbanov > Tested-by: Robert Marko > Signed-off-by: Selvam Sathappan Periakaruppan > Signed-off-by: Baruch Siach Reviewed-by: Johan Hovold Johan _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel