From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C28AC04A68 for ; Thu, 28 Jul 2022 19:15:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lJ9AgOwaV7LIW2Bal32+ew7A3ZqrxCQXJEMgX9h3k1I=; b=BxKZxsdL2CaVoE KjGRjpeExz2cqcIPZ3FVLDeZEvHk2C8I2NHhgPe+smzlW5DF4+5V3uZStEeqbABZRS5Yodeg2Ip/j XomDdQx4Ihr+GkVV0kuBJvEmY61txhfdKKmRS+kIZz63TG8ibsQdqOwEimJHmKZu9YNR039LXbK5K //h5XUJAs7arPdfBCQOKElLGNryilYi/g4LsYAAR4HPGfVE339Kw2iTijfQSZS/MQImfVfozkOPAd yTdMfEhUvY/gBvZue5JBlEbUM6N+v38tp0eFtf94FC1dvK8in9IOQOGTPuA4CUiGBK1Ltj/sXuPH4 IzF2l9XQVfU5ARG731+w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oH8xA-00DRhq-2z; Thu, 28 Jul 2022 19:13:48 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oH8x8-00DReT-TY for linux-arm-kernel@bombadil.infradead.org; Thu, 28 Jul 2022 19:13:46 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=IEjnN7BBJcXZOhAvN2ykyff7p69fuCOuEP/SDS5veFI=; b=oURvzLrVyva9ow5aWCV70Odp5Q x31LjmWgxN03wo378N/L5uZtaFAw3IXzfn6W7kvmgwznA/57WaO84Z7BHA/Lcm9Uz9TXok7I1sJPw ExauzvPn4ZIYLbGBHVnXMD8TSHUdsdhlL2IbXb638cFsQWRTHoiKkFxYV+IW9zIJqGbX324duWwvh 7qSKAg4DucwRWXE6dMyKVZca7d0A5ULii+vNDw4BMomlxq8ZxdC66i0uT90Aoup9Ykx1toF3vO9vh ZptDBxlyX55KPX9YQHZmgJOnC1yGL0tujPU4ejPnfTEzyiSUiA2aWKXXq4jsCaVNBXkKUWC8pTkL2 O52nC4WA==; Received: from [187.19.239.32] (helo=quaco.ghostprotocols.net) by desiato.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1oH8x0-001A7j-OJ; Thu, 28 Jul 2022 19:13:39 +0000 Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id 4C0A0405DD; Thu, 28 Jul 2022 16:13:35 -0300 (-03) Date: Thu, 28 Jul 2022 16:13:35 -0300 From: Arnaldo Carvalho de Melo To: Nick Forrington Cc: John Garry , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Will Deacon , James Clark , Mike Leach , Leo Yan , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] perf vendor events arm64: Arm Cortex-A78C and X1C Message-ID: References: <20220610174459.615995-1-nick.forrington@arm.com> <2955958b-4982-42bc-7c68-82cd23462b35@huawei.com> <3379eac1-d398-60be-b606-10098702d7aa@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <3379eac1-d398-60be-b606-10098702d7aa@arm.com> X-Url: http://acmel.wordpress.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Em Thu, Jul 28, 2022 at 05:17:08PM +0100, Nick Forrington escreveu: > On 13/06/2022 11:09, John Garry wrote: > > On 10/06/2022 18:44, Nick Forrington wrote: > > > Add PMU events for the Arm Cortex-A78C and Arm Cortex-X1C CPUs. > > > > > > Events for Arm Cortex-A78C match those for Arm Cortex-A78. > > > Events for Arm Cortex-X1C match those for Arm Cortex- X1. > > > > > > As such, this is just a mapfile change. > > > > > > Main ID Register (MIDR) and event data is sourced from the corresponding > > > Arm Technical Reference Manuals: > > > > > > Arm Cortex-A78C > > > https://developer.arm.com/documentation/102226/ > > > > > > Arm Cortex-X1C > > > https://developer.arm.com/documentation/101968/ > > > > > > Signed-off-by: Nick Forrington > > > > Reviewed-by: John Garry > > Could this be applied please? Thanks, applied. - Arnaldo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel