From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E864BECAA24 for ; Thu, 25 Aug 2022 19:32:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2H9LY5Whw3MvW4GNqh3Ve1ZJbjHWo41kmTuOb6ytVXE=; b=PqJA0RuTO2tOQO GXU2Hqb7gTumTyhOOXY9tXT1NKIpTaoLjtGzdh/iojUzUQu99mVeIHNg5bJr2zd5zX3v4B/m73RXZ GbpTftAwkbtrjmxL/3D/RVPJ/NtcDAWGXvTmAy+DLSFrXHd0vjZhEVKYB7eDagjkwaVsmkwhLrM6E EcJ5NZLUx7hr7QGwg0A3KdOJjcCcj40BeXBobIXXRspGU4w7e1PLmx8MSAWfTSvVcfwxFSVtolA4R NePIgj/L0mcaaEIGi/Qh68VjFHyc+xg+ZDPtLdyx2t6ptNyJGQAdDufEclGmNnoponhzXi6cGXO9m TgyxNKyhWfQqZtILp2mw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oRIZy-002jql-5x; Thu, 25 Aug 2022 19:31:50 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oRIZw-002jpt-18 for linux-arm-kernel@bombadil.infradead.org; Thu, 25 Aug 2022 19:31:48 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=bV7VnS7q2tJ4Va8jGj9IY8VN7C8928/85PWiid0D7H8=; b=CEouj+z/bV/MfHdCKQwJKGjRmx MZ6Mwc2VeEKFtVc3RtCWEXCe7yO0Cjm2JwnlGZgexowuvHB4T0xs8vIb70/HzWcvGsnd/9dnuhm4o DeWbtwflwJL5lOs4b5ZBYUTI2JkeIVQVbjOANI87Rc0dIWGvfYJTx8AkscokE/gwkjc4u34u30hk/ MeYaPZyEbxQGnAZP+QljLmMS7Y3d9mkCkgJz3dzl80GCoTgNos7TqhdCZknQGWKD1IACTkMkvsHEc vmlHEiRZIKfaxG1sWTv0NQV9DyAC0Z0nv4mit7yQJ58t/03MHie9MqPKYe2D4A4LJ3Db63wpyN8Ue BWrTefaw==; Received: from [187.19.239.32] (helo=quaco.ghostprotocols.net) by desiato.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1oRIZt-0065a5-S2; Thu, 25 Aug 2022 19:31:46 +0000 Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id 1AE6B404A1; Thu, 25 Aug 2022 16:31:42 -0300 (-03) Date: Thu, 25 Aug 2022 16:31:42 -0300 From: Arnaldo Carvalho de Melo To: Rob Herring Cc: Alexander Shishkin , Ingo Molnar , Catalin Marinas , Peter Zijlstra , Mark Rutland , Will Deacon , Jiri Olsa , Namhyung Kim , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org Subject: Re: [PATCH RFC v1 2/3] perf: Add perf_event_attr::config3 Message-ID: References: <20220825-arm-spe-v8-7-v1-0-c75b8d92e692@kernel.org> <20220825-arm-spe-v8-7-v1-2-c75b8d92e692@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220825-arm-spe-v8-7-v1-2-c75b8d92e692@kernel.org> X-Url: http://acmel.wordpress.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Em Thu, Aug 25, 2022 at 01:08:01PM -0500, Rob Herring escreveu: > Arm SPEv1.2 adds another 64-bits of event filtering control. As the > existing perf_event_attr::configN fields are all used up for SPE PMU, an > additional field is needed. Add a new 'config3' field. Try not to have tools/ and kernel code in the same patch, else you'll burden kernel developers into testing tools/, which so far has been refrained. First you get the kernel bits in, then tooling. Locally of course you test it together. - Arnaldo > Signed-off-by: Rob Herring > > diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h > index 03b370062741..b53f9b958235 100644 > --- a/include/uapi/linux/perf_event.h > +++ b/include/uapi/linux/perf_event.h > @@ -333,6 +333,7 @@ enum perf_event_read_format { > #define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ > #define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */ > #define PERF_ATTR_SIZE_VER7 128 /* add: sig_data */ > +#define PERF_ATTR_SIZE_VER8 136 /* add: config3 */ > > /* > * Hardware event_id to monitor via a performance monitoring event: > @@ -474,6 +475,8 @@ struct perf_event_attr { > * truncated accordingly on 32 bit architectures. > */ > __u64 sig_data; > + > + __u64 config3; /* extension of config2 */ > }; > > /* > diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h > index 581ed4bdc062..7fad17853310 100644 > --- a/tools/include/uapi/linux/perf_event.h > +++ b/tools/include/uapi/linux/perf_event.h > @@ -333,6 +333,7 @@ enum perf_event_read_format { > #define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ > #define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */ > #define PERF_ATTR_SIZE_VER7 128 /* add: sig_data */ > +#define PERF_ATTR_SIZE_VER8 136 /* add: config3 */ > > /* > * Hardware event_id to monitor via a performance monitoring event: > @@ -474,6 +475,8 @@ struct perf_event_attr { > * truncated accordingly on 32 bit architectures. > */ > __u64 sig_data; > + > + __u64 config3; /* extension of config2 */ > }; > > /* > > -- > b4 0.10.0-dev -- - Arnaldo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel