From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 241D8C38145 for ; Wed, 7 Sep 2022 14:11:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4jBU15sZemLctLSXVXIo3aZAiPdVMtPxLOPTtc2tBJA=; b=vzZbc7xKV4AfJQ 9igpoJNaGZRvmP+bnRpL7lpj4+fbHY48BN77j+zVOIqH8P8Ca1e6v0n4HUs9YJrdXjvRxLa88btqb ilU6bdzz+4ZCNiCOeO7F2jFNkBB5cJ0GvgHOk1yAhRk8xWLk4SyoiLts/ZnLYnhEV5wAvqf4V/2TO Q4BCPkJIY4+9bMamdmBF0E5vKo01QMsha3CoS23jR2n4+B2Awsm/5dNnBqIJzozjZdcegj35vie+c BSe5/8iIbP+lNf1UqW73qmSca7bNPR0T/3bK9HnGNEP0pW2Oz4TUg7oLQm8sa45nLwj8pYezQFeB3 yFOjD3VENQ3eV6NLYM6Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVvlM-006jtM-2g; Wed, 07 Sep 2022 14:10:44 +0000 Received: from pandora.armlinux.org.uk ([2001:4d48:ad52:32c8:5054:ff:fe00:142]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVvlI-006jrd-PX for linux-arm-kernel@lists.infradead.org; Wed, 07 Sep 2022 14:10:42 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Sender:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=BcwPBQ3TCJNk7nYltRAFBSN9K4d6QBwjuu8Yhz2K4lo=; b=Lq0N0sEr5VRcaxJnB12qncb2BV ppbPPx2bh/Q4ZYw58ldxbUImgeORCTI7JpMGlcTzXN2dj5lKQclH0DVeqV4vmwuCPefCQcG3d1WAj fRcsCO71O+vDWBN+95F8b748KckPntnV712ExDcaVp3IO5vMkRMaSjWLuqMRYd/ncNNn5n/IrTt9y lU1uFLvO7fsqDhL3pPgepJZhLWsL3Mupr7ZdXiog+hqCCdfyYZ3o/U5H35Mphwzq6Ns4uYhuV1iHx w8zdqOEHPzHQp47E21b7kG0HYFx8uuRIDUQ1cEFA/LCjsb8C3ArlJtvrd7U4v5EkagFzVpXlsvasY ykuyiCmw==; Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:34178) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oVvlF-0005Tk-2J; Wed, 07 Sep 2022 15:10:37 +0100 Received: from linux by shell.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1oVvlE-0001AI-0j; Wed, 07 Sep 2022 15:10:36 +0100 Date: Wed, 7 Sep 2022 15:10:35 +0100 From: "Russell King (Oracle)" To: Christoph Hellwig Cc: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, Mark Rutland , Robin Murphy , Ard Biesheuvel Subject: Re: [PATCH] arm64: dma: Drop cache invalidation from arch_dma_prep_coherent() Message-ID: References: <20220823122111.17439-1-will@kernel.org> <20220907090434.GB30704@lst.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220907090434.GB30704@lst.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220907_071040_849569_535187BD X-CRM114-Status: GOOD ( 19.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 07, 2022 at 11:04:34AM +0200, Christoph Hellwig wrote: > On Wed, Aug 24, 2022 at 11:00:02PM +0100, Catalin Marinas wrote: > > (I was wondering why not just invalidate without clean but it could be > > that the allocated memory was zeroed and we want that to make it to the > > PoC) > > The memory is zerod after arch_dma_prep_coherent. So a pure invalidate > seems like the right thing to do here. My thoughts on Christoph's comment... That seems backwards to me. If we allocate memory, clean (and maybe invalidate) the cache, and then zero the memory _after_ the clean, then couldn't we be creating dirty cache lines. There are caches out there that are write-allocate, which means that by writing zeros to memory, you drag cache lines back into the cache. These dirty cache lines could then be written back at some random time later, corrupting the data that has been DMA'd to the buffer or placed there via the uncached mapping (if the architecture doesn't hit those cache lines.) It has to be: - allocate - zero - deal with the cache not: - allocate - deal with the cache - zero Moreover, if one does: - allocate - invalidate - zero - clean+(invalidate?) then aren't we making the zero operation potentially more expensive than if we had cache lines already there - I'm thinking there about a no-write-allocate cache here. Those cache lines could have been used to buffer the zeroing writes and then written out later. Depending on the architecture, having cached lines may mean that write merging happens, meaning writebacks to memory occur in larger chunks. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel