From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97405C433F5 for ; Fri, 30 Sep 2022 13:26:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kKuE+NTXhqJaipMFJrIPRq2M2WHkBkkESICyH1YVLEI=; b=KJvgXm8x6l2LjL 0ZlONkJGnkg13v0odYnfV5i5CiJySIU8uSvs3/t9+tByAsgSn7tZtvoab6DH7b6UjuHOK2kMN+1Wk 5dC0Lp1PKA6k+SDMmDOQBYCGShtcdwnuElCBSTRFWn1W0XqahJWsTgq/CWuTZ8aFuebE1B1xYmLpq OufcfeVPiyhidrRWr5j2VU/X6raOpJmxwKzjEo5bktzbCZoB0xgNM/hep+pvZid4/jPYJbAANCpN/ 3eTdC2JNYCfVFjan+/IgJDezL3E8/BnC3W4TIit8divPpTAVhJW3VHy8Z5Gh0VAdnNaGHX77tVIDp RxiXI9vsNKR/R9uxCRtg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oeG1d-009OKM-QK; Fri, 30 Sep 2022 13:25:57 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oeG1Z-009OIo-UB for linux-arm-kernel@lists.infradead.org; Fri, 30 Sep 2022 13:25:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D3C2015A1; Fri, 30 Sep 2022 06:25:58 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.81.185]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B9DCC3F792; Fri, 30 Sep 2022 06:25:51 -0700 (PDT) Date: Fri, 30 Sep 2022 14:25:46 +0100 From: Mark Rutland To: Kristina Martsenko Cc: linux-arm-kernel@lists.infradead.org Subject: Re: [boot-wrapper PATCH] aarch64: enable access to HCRX_EL2 Message-ID: References: <20220927142343.1428008-1-kristina.martsenko@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220927142343.1428008-1-kristina.martsenko@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220930_062554_036223_64033E0C X-CRM114-Status: GOOD ( 14.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Sep 27, 2022 at 03:23:43PM +0100, Kristina Martsenko wrote: > Allow EL2 to access the HCRX_EL2 register which provides hypervisor > controls similarly to HCR_EL2. > > Signed-off-by: Kristina Martsenko Thanks; applied. Mark. > --- > arch/aarch64/include/asm/cpu.h | 3 +++ > arch/aarch64/init.c | 3 +++ > 2 files changed, 6 insertions(+) > > diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h > index 69dfcd5..d063948 100644 > --- a/arch/aarch64/include/asm/cpu.h > +++ b/arch/aarch64/include/asm/cpu.h > @@ -49,6 +49,7 @@ > #define SCR_EL3_FGTEN BIT(27) > #define SCR_EL3_ECVEN BIT(28) > #define SCR_EL3_TME BIT(34) > +#define SCR_EL3_HXEn BIT(38) > #define SCR_EL3_EnTP2 BIT(41) > > #define HCR_EL2_RES1 BIT(1) > @@ -70,6 +71,8 @@ > #define ID_AA64MMFR0_EL1_FGT BITS(59, 56) > #define ID_AA64MMFR0_EL1_ECV BITS(63, 60) > > +#define ID_AA64MMFR1_EL1_HCX BITS(43, 40) > + > #define ID_AA64PFR1_EL1_MTE BITS(11, 8) > #define ID_AA64PFR1_EL1_SME BITS(27, 24) > #define ID_AA64PFR0_EL1_SVE BITS(35, 32) > diff --git a/arch/aarch64/init.c b/arch/aarch64/init.c > index db73b58..471e234 100644 > --- a/arch/aarch64/init.c > +++ b/arch/aarch64/init.c > @@ -61,6 +61,9 @@ void cpu_init_el3(void) > if (mrs_field(ID_AA64MMFR0_EL1, ECV) >= 2) > scr |= SCR_EL3_ECVEN; > > + if (mrs_field(ID_AA64MMFR1_EL1, HCX)) > + scr |= SCR_EL3_HXEn; > + > if (mrs_field(ID_AA64PFR1_EL1, MTE) >= 2) > scr |= SCR_EL3_ATA; > > > base-commit: 6a0fc40035f9bb581054eb26fbac3c659cfa99b2 > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel