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Thu, 27 Mar 2025 17:47:13 +0800 (CST) Date: Thu, 27 Mar 2025 17:47:12 +0800 From: Peter Chen To: Krzysztof Kozlowski Cc: Marc Zyngier , soc@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com, marcin@juszkiewicz.com.pl, kajetan.puchalski@arm.com, Krzysztof Kozlowski , Fugang Duan Subject: Re: [PATCH v5 5/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support Message-ID: References: <20250324062420.360289-1-peter.chen@cixtech.com> <20250324062420.360289-6-peter.chen@cixtech.com> <865xjxmlgl.wl-maz@kernel.org> <861pukm9yd.wl-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: HK3PEPF0000021F:EE_|SEZPR06MB6140:EE_ X-MS-Office365-Filtering-Correlation-Id: 78bfbb01-c765-46cf-ad43-08dd6d145ab3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|82310400026|376014|7416014; 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X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Mar 2025 09:47:14.2476 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 78bfbb01-c765-46cf-ad43-08dd6d145ab3 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: HK3PEPF0000021F.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR06MB6140 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250327_024725_207885_9ADA1D6F X-CRM114-Status: GOOD ( 29.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 25-03-27 09:40:10, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL > > On 27/03/2025 09:35, Peter Chen wrote: > > On 25-03-27 08:16:33, Krzysztof Kozlowski wrote: > >>>> > >>>> No, you are deliberately choosing to make this platform useless. > >>>> > >>>> That's a bit sad, and a waste of everybody's time. > >>>> > >>> > >>> Hi Marc, > >>> > >>> Thanks for your interesting of our platform, and your comments > >>> help us a lot. But I don't think it wastes reviewers and maintainers > >>> time, a clean patch set saves everyone's time during upstream process. > >>> > >>> For how to organize the patch set for SoC, Krzysztof gave good summary > >>> at [1]. We are going on upstream [2], this patch set is just a start > >>> and base but not like you said for marketing purpose. > >> > >> > >> I do not think I suggested in [1] to ever send new SoC containing only > >> CPUs and interrupt controller, without even serial. My instruction [1] > >> was how to organize it. The DTS can be even fully complete, see the > >> upstreaming example I have been using all the time - Qualcomm SM8650: > >> > >> https://lore.kernel.org/all/20231124-topic-sm8650-upstream-dt-v4-0-e402e73cc5f0@linaro.org/ > >> > >> Entire SoC sent to mailing list on the day one of public release of that > >> flagship Qualcomm SoC. The SoC DTSI and board DTS have almost complete > >> picture, except few trickier pieces... but it even has full display and > >> GPU! Plus, as I explained on my email on samsung-soc, that DTS/DTSI > >> patchset references all other bindings with their state, so SoC > >> maintainers can understand what is the overall progress and what will be > >> the result in DT schema checks, if they apply the patchset. > >> > > > > Hi Krzysztof, > > > > Like I said in this thread before, without this initial support, > > we can't even add mailbox binding that the dt_binding_check will > > report warnings/errors [1], the reason is "cix" has not existed > > at vendor-prefixes binding. How we handle this dependency? > > Not different than all other SoCs. There is no dependency, you just send > your patch and tell where the bindings are. Just like I asked in the [1] > you linked on samsung-soc. Just like all Qualcomm upstreaming goes, e.g. > SM8650 I linked here. > > Just like maintainer-soc profiles are explaining. I told you to read > them on IRC. > > Your way is contradictory to three sources describing process and two of > these sources - my samsung-soc posting and maintainers-soc-clean-dts > profile - are known to you. > > > > > I thought we need to move one step and step before, and keep clean > > and avoid warning and error for every submission, but it seems not > > the way you prefer. > > No, from where did you get such impression? Maintainers-soc-clean-dts > explicitly covers this case and I WROTE IT, so how can I prefer > something else? > Krzysztof, I did not mean soc dts, I mean the mailbox binding checking warning which depends on this patch set. https://lore.kernel.org/lkml/174290730775.1655008.14031380406017771195.robh@kernel.org/ -- Best regards, Peter