* [PATCH 0/2] Add NETC support for i.MX95
@ 2024-12-18 6:17 Wei Fang
2024-12-18 6:17 ` [PATCH 1/2] arm64: dts: imx95: add NETC related nodes Wei Fang
2024-12-18 6:17 ` [PATCH 2/2] arm64: dts: imx95: add ENETC 0 support Wei Fang
0 siblings, 2 replies; 6+ messages in thread
From: Wei Fang @ 2024-12-18 6:17 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, s.hauer, kernel, festevam,
frank.li
Cc: devicetree, imx, linux-arm-kernel, linux-kernel
We have added support for i.MX95 NETC related drivers, so it's time to
add NETC related nodes in DTS and enable the use of ENETC 0.
Wei Fang (2):
arm64: dts: imx95: add NETC related nodes
arm64: dts: imx95: add ENETC 0 support
.../boot/dts/freescale/imx95-19x19-evk.dts | 52 +++++++++++
arch/arm64/boot/dts/freescale/imx95.dtsi | 93 +++++++++++++++++++
2 files changed, 145 insertions(+)
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] arm64: dts: imx95: add NETC related nodes
2024-12-18 6:17 [PATCH 0/2] Add NETC support for i.MX95 Wei Fang
@ 2024-12-18 6:17 ` Wei Fang
2024-12-18 18:01 ` Frank Li
2024-12-18 18:06 ` Frank Li
2024-12-18 6:17 ` [PATCH 2/2] arm64: dts: imx95: add ENETC 0 support Wei Fang
1 sibling, 2 replies; 6+ messages in thread
From: Wei Fang @ 2024-12-18 6:17 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, s.hauer, kernel, festevam,
frank.li
Cc: devicetree, imx, linux-arm-kernel, linux-kernel
Add NETC related nodes for i.MX95.
Signed-off-by: Wei Fang <wei.fang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx95.dtsi | 93 ++++++++++++++++++++++++
1 file changed, 93 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index e9c7a8265d71..86f9fed9998c 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1702,5 +1702,98 @@ ddr-pmu@4e090dc0 {
reg = <0x0 0x4e090dc0 0x0 0x200>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ netc_blk_ctrl: system-controller@4cde0000 {
+ compatible = "nxp,imx95-netc-blk-ctrl";
+ reg = <0x0 0x4cde0000 0x0 0x10000>,
+ <0x0 0x4cdf0000 0x0 0x10000>,
+ <0x0 0x4c81000c 0x0 0x18>;
+ reg-names = "ierb", "prb", "netcmix";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ power-domains = <&scmi_devpd IMX95_PD_NETC>;
+ assigned-clocks = <&scmi_clk IMX95_CLK_ENET>,
+ <&scmi_clk IMX95_CLK_ENETREF>;
+ assigned-clock-parents = <&scmi_clk IMX95_CLK_SYSPLL1_PFD2>,
+ <&scmi_clk IMX95_CLK_SYSPLL1_PFD0>;
+ assigned-clock-rates = <666666666>, <250000000>;
+ clocks = <&scmi_clk IMX95_CLK_ENET>;
+ clock-names = "ipg";
+ status = "disabled";
+
+ netc_bus0: pcie@4ca00000 {
+ compatible = "pci-host-ecam-generic";
+ reg = <0x0 0x4ca00000 0x0 0x100000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ bus-range = <0x0 0x0>;
+ msi-map = <0x0 &its 0x60 0x1>, //ENETC0 PF
+ <0x10 &its 0x61 0x1>, //ENETC0 VF0
+ <0x20 &its 0x62 0x1>, //ENETC0 VF1
+ <0x40 &its 0x63 0x1>, //ENETC1 PF
+ <0x80 &its 0x64 0x1>, //ENETC2 PF
+ <0x90 &its 0x65 0x1>, //ENETC2 VF0
+ <0xa0 &its 0x66 0x1>, //ENETC2 VF1
+ <0xc0 &its 0x67 0x1>; //NETC Timer
+ /* ENETC0~2 and Timer BAR0 - non-prefetchable memory */
+ ranges = <0x82000000 0x0 0x4cc00000 0x0 0x4cc00000 0x0 0xe0000
+ /* Timer BAR2 - prefetchable memory */
+ 0xc2000000 0x0 0x4cd00000 0x0 0x4cd00000 0x0 0x10000
+ /* ENETC0~2: VF0-1 BAR0 - non-prefetchable memory */
+ 0x82000000 0x0 0x4cd20000 0x0 0x4cd20000 0x0 0x60000
+ /* ENETC0~2: VF0-1 BAR2 - prefetchable memory */
+ 0xc2000000 0x0 0x4cd80000 0x0 0x4cd80000 0x0 0x60000>;
+
+ enetc_port0: ethernet@0,0 {
+ compatible = "pci1131,e101";
+ reg = <0x000000 0 0 0 0>;
+ clocks = <&scmi_clk IMX95_CLK_ENETREF>;
+ clock-names = "ref";
+ status = "disabled";
+ };
+
+ enetc_port1: ethernet@8,0 {
+ compatible = "pci1131,e101";
+ reg = <0x004000 0 0 0 0>;
+ clocks = <&scmi_clk IMX95_CLK_ENETREF>;
+ clock-names = "ref";
+ status = "disabled";
+ };
+
+ enetc_port2: ethernet@10,0 {
+ compatible = "pci1131,e101";
+ reg = <0x008000 0 0 0 0>;
+ status = "disabled";
+ };
+
+ netc_timer: ethernet@18,0 {
+ reg = <0x00c000 0 0 0 0>;
+ status = "disabled";
+ };
+ };
+
+ netc_bus1: pcie@4cb00000 {
+ compatible = "pci-host-ecam-generic";
+ reg = <0x0 0x4cb00000 0x0 0x100000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ bus-range = <0x1 0x1>;
+ /* EMDIO BAR0 - non-prefetchable memory */
+ ranges = <0x82000000 0x0 0x4cce0000 0x0 0x4cce0000 0x0 0x20000
+ /* EMDIO BAR2 - prefetchable memory */
+ 0xc2000000 0x0 0x4cd10000 0x0 0x4cd10000 0x0 0x10000>;
+
+ netc_emdio: mdio@0,0 {
+ compatible = "pci1131,ee00";
+ reg = <0x010000 0 0 0 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] arm64: dts: imx95: add ENETC 0 support
2024-12-18 6:17 [PATCH 0/2] Add NETC support for i.MX95 Wei Fang
2024-12-18 6:17 ` [PATCH 1/2] arm64: dts: imx95: add NETC related nodes Wei Fang
@ 2024-12-18 6:17 ` Wei Fang
2024-12-18 18:04 ` Frank Li
1 sibling, 1 reply; 6+ messages in thread
From: Wei Fang @ 2024-12-18 6:17 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, s.hauer, kernel, festevam,
frank.li
Cc: devicetree, imx, linux-arm-kernel, linux-kernel
Add ENETC 0 (1G ethernet port) support for i.MX95-19x19-EVK board. In
addition, because all ENETC instances share MDIO bus, so enable EMDIO
at the same time.
Signed-off-by: Wei Fang <wei.fang@nxp.com>
---
.../boot/dts/freescale/imx95-19x19-evk.dts | 52 +++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 6086cb7fa5a0..e838234c8317 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -38,6 +38,7 @@ aliases {
mmc0 = &usdhc1;
mmc1 = &usdhc2;
serial0 = &lpuart1;
+ ethernet0 = &enetc_port0;
};
bt_sco_codec: audio-codec-bt-sco {
@@ -428,6 +429,33 @@ &wdog3 {
status = "okay";
};
+&netcmix_blk_ctrl {
+ status = "okay";
+};
+
+&netc_blk_ctrl {
+ status = "okay";
+};
+
+&enetc_port0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enetc0>;
+ phy-handle = <ðphy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&netc_emdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_emdio>;
+ status = "okay";
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ realtek,clkout-disable;
+ };
+};
+
&scmi_iomuxc {
pinctrl_flexspi1: flexspi1grp {
fsl,pins = <
@@ -665,6 +693,30 @@ IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
+
+ pinctrl_enetc0: enetc0grp {
+ fsl,pins = <
+ IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3 0x57e
+ IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2 0x57e
+ IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1 0x57e
+ IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0 0x57e
+ IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL 0x57e
+ IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK 0x58e
+ IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL 0x57e
+ IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK 0x58e
+ IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0 0x57e
+ IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1 0x57e
+ IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2 0x57e
+ IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3 0x57e
+ >;
+ };
+
+ pinctrl_emdio: emdiogrp{
+ fsl,pins = <
+ IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC 0x57e
+ IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO 0x97e
+ >;
+ };
};
&thermal_zones {
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm64: dts: imx95: add NETC related nodes
2024-12-18 6:17 ` [PATCH 1/2] arm64: dts: imx95: add NETC related nodes Wei Fang
@ 2024-12-18 18:01 ` Frank Li
2024-12-18 18:06 ` Frank Li
1 sibling, 0 replies; 6+ messages in thread
From: Frank Li @ 2024-12-18 18:01 UTC (permalink / raw)
To: Wei Fang
Cc: robh, krzk+dt, conor+dt, shawnguo, s.hauer, kernel, festevam,
devicetree, imx, linux-arm-kernel, linux-kernel
On Wed, Dec 18, 2024 at 02:17:24PM +0800, Wei Fang wrote:
> Add NETC related nodes for i.MX95.
>
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx95.dtsi | 93 ++++++++++++++++++++++++
> 1 file changed, 93 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index e9c7a8265d71..86f9fed9998c 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -1702,5 +1702,98 @@ ddr-pmu@4e090dc0 {
> reg = <0x0 0x4e090dc0 0x0 0x200>;
> interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + netc_blk_ctrl: system-controller@4cde0000 {
> + compatible = "nxp,imx95-netc-blk-ctrl";
> + reg = <0x0 0x4cde0000 0x0 0x10000>,
> + <0x0 0x4cdf0000 0x0 0x10000>,
> + <0x0 0x4c81000c 0x0 0x18>;
> + reg-names = "ierb", "prb", "netcmix";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + power-domains = <&scmi_devpd IMX95_PD_NETC>;
> + assigned-clocks = <&scmi_clk IMX95_CLK_ENET>,
> + <&scmi_clk IMX95_CLK_ENETREF>;
> + assigned-clock-parents = <&scmi_clk IMX95_CLK_SYSPLL1_PFD2>,
> + <&scmi_clk IMX95_CLK_SYSPLL1_PFD0>;
> + assigned-clock-rates = <666666666>, <250000000>;
> + clocks = <&scmi_clk IMX95_CLK_ENET>;
> + clock-names = "ipg";
> + status = "disabled";
> +
> + netc_bus0: pcie@4ca00000 {
> + compatible = "pci-host-ecam-generic";
> + reg = <0x0 0x4ca00000 0x0 0x100000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + bus-range = <0x0 0x0>;
> + msi-map = <0x0 &its 0x60 0x1>, //ENETC0 PF
> + <0x10 &its 0x61 0x1>, //ENETC0 VF0
> + <0x20 &its 0x62 0x1>, //ENETC0 VF1
> + <0x40 &its 0x63 0x1>, //ENETC1 PF
> + <0x80 &its 0x64 0x1>, //ENETC2 PF
> + <0x90 &its 0x65 0x1>, //ENETC2 VF0
> + <0xa0 &its 0x66 0x1>, //ENETC2 VF1
> + <0xc0 &its 0x67 0x1>; //NETC Timer
> + /* ENETC0~2 and Timer BAR0 - non-prefetchable memory */
> + ranges = <0x82000000 0x0 0x4cc00000 0x0 0x4cc00000 0x0 0xe0000
> + /* Timer BAR2 - prefetchable memory */
> + 0xc2000000 0x0 0x4cd00000 0x0 0x4cd00000 0x0 0x10000
> + /* ENETC0~2: VF0-1 BAR0 - non-prefetchable memory */
> + 0x82000000 0x0 0x4cd20000 0x0 0x4cd20000 0x0 0x60000
> + /* ENETC0~2: VF0-1 BAR2 - prefetchable memory */
> + 0xc2000000 0x0 0x4cd80000 0x0 0x4cd80000 0x0 0x60000>;
> +
> + enetc_port0: ethernet@0,0 {
> + compatible = "pci1131,e101";
> + reg = <0x000000 0 0 0 0>;
> + clocks = <&scmi_clk IMX95_CLK_ENETREF>;
> + clock-names = "ref";
> + status = "disabled";
> + };
> +
> + enetc_port1: ethernet@8,0 {
> + compatible = "pci1131,e101";
> + reg = <0x004000 0 0 0 0>;
> + clocks = <&scmi_clk IMX95_CLK_ENETREF>;
> + clock-names = "ref";
> + status = "disabled";
> + };
> +
> + enetc_port2: ethernet@10,0 {
> + compatible = "pci1131,e101";
> + reg = <0x008000 0 0 0 0>;
> + status = "disabled";
> + };
> +
> + netc_timer: ethernet@18,0 {
> + reg = <0x00c000 0 0 0 0>;
> + status = "disabled";
> + };
> + };
> +
> + netc_bus1: pcie@4cb00000 {
> + compatible = "pci-host-ecam-generic";
> + reg = <0x0 0x4cb00000 0x0 0x100000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + bus-range = <0x1 0x1>;
> + /* EMDIO BAR0 - non-prefetchable memory */
> + ranges = <0x82000000 0x0 0x4cce0000 0x0 0x4cce0000 0x0 0x20000
> + /* EMDIO BAR2 - prefetchable memory */
> + 0xc2000000 0x0 0x4cd10000 0x0 0x4cd10000 0x0 0x10000>;
> +
> + netc_emdio: mdio@0,0 {
> + compatible = "pci1131,ee00";
> + reg = <0x010000 0 0 0 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> + };
> + };
> };
> };
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm64: dts: imx95: add ENETC 0 support
2024-12-18 6:17 ` [PATCH 2/2] arm64: dts: imx95: add ENETC 0 support Wei Fang
@ 2024-12-18 18:04 ` Frank Li
0 siblings, 0 replies; 6+ messages in thread
From: Frank Li @ 2024-12-18 18:04 UTC (permalink / raw)
To: Wei Fang
Cc: robh, krzk+dt, conor+dt, shawnguo, s.hauer, kernel, festevam,
devicetree, imx, linux-arm-kernel, linux-kernel
On Wed, Dec 18, 2024 at 02:17:25PM +0800, Wei Fang wrote:
nit: arm64: dts: imx95-19x19-evk: add ENETC 0 support
> Add ENETC 0 (1G ethernet port) support for i.MX95-19x19-EVK board. In
> addition, because all ENETC instances share MDIO bus, so enable EMDIO
> at the same time.
>
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> ---
> .../boot/dts/freescale/imx95-19x19-evk.dts | 52 +++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> index 6086cb7fa5a0..e838234c8317 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> @@ -38,6 +38,7 @@ aliases {
> mmc0 = &usdhc1;
> mmc1 = &usdhc2;
> serial0 = &lpuart1;
> + ethernet0 = &enetc_port0;
> };
>
> bt_sco_codec: audio-codec-bt-sco {
> @@ -428,6 +429,33 @@ &wdog3 {
> status = "okay";
> };
>
> +&netcmix_blk_ctrl {
> + status = "okay";
> +};
> +
> +&netc_blk_ctrl {
> + status = "okay";
> +};
> +
> +&enetc_port0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enetc0>;
> + phy-handle = <ðphy0>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +};
> +
> +&netc_emdio {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_emdio>;
> + status = "okay";
> +
> + ethphy0: ethernet-phy@1 {
> + reg = <1>;
> + realtek,clkout-disable;
> + };
> +};
Please keep order by these node. netc should after enetc
> +
> &scmi_iomuxc {
> pinctrl_flexspi1: flexspi1grp {
> fsl,pins = <
> @@ -665,6 +693,30 @@ IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
> IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> >;
> };
> +
> + pinctrl_enetc0: enetc0grp {
> + fsl,pins = <
> + IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3 0x57e
> + IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2 0x57e
> + IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1 0x57e
> + IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0 0x57e
> + IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL 0x57e
> + IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK 0x58e
> + IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL 0x57e
> + IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK 0x58e
> + IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0 0x57e
> + IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1 0x57e
> + IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2 0x57e
> + IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3 0x57e
> + >;
> + };
> +
> + pinctrl_emdio: emdiogrp{
> + fsl,pins = <
> + IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC 0x57e
> + IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO 0x97e
> + >;
> + };
some here, keep order,
enetc0grp should before flexspi1grp
Frank
> };
>
> &thermal_zones {
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm64: dts: imx95: add NETC related nodes
2024-12-18 6:17 ` [PATCH 1/2] arm64: dts: imx95: add NETC related nodes Wei Fang
2024-12-18 18:01 ` Frank Li
@ 2024-12-18 18:06 ` Frank Li
1 sibling, 0 replies; 6+ messages in thread
From: Frank Li @ 2024-12-18 18:06 UTC (permalink / raw)
To: Wei Fang
Cc: robh, krzk+dt, conor+dt, shawnguo, s.hauer, kernel, festevam,
devicetree, imx, linux-arm-kernel, linux-kernel
On Wed, Dec 18, 2024 at 02:17:24PM +0800, Wei Fang wrote:
> Add NETC related nodes for i.MX95.
>
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx95.dtsi | 93 ++++++++++++++++++++++++
> 1 file changed, 93 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index e9c7a8265d71..86f9fed9998c 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -1702,5 +1702,98 @@ ddr-pmu@4e090dc0 {
> reg = <0x0 0x4e090dc0 0x0 0x200>;
> interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + netc_blk_ctrl: system-controller@4cde0000 {
keep order by hex address value.
4cde0000 should ahead ddr-pmu@4e090dc0.
Frank
> + compatible = "nxp,imx95-netc-blk-ctrl";
> + reg = <0x0 0x4cde0000 0x0 0x10000>,
> + <0x0 0x4cdf0000 0x0 0x10000>,
> + <0x0 0x4c81000c 0x0 0x18>;
> + reg-names = "ierb", "prb", "netcmix";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + power-domains = <&scmi_devpd IMX95_PD_NETC>;
> + assigned-clocks = <&scmi_clk IMX95_CLK_ENET>,
> + <&scmi_clk IMX95_CLK_ENETREF>;
> + assigned-clock-parents = <&scmi_clk IMX95_CLK_SYSPLL1_PFD2>,
> + <&scmi_clk IMX95_CLK_SYSPLL1_PFD0>;
> + assigned-clock-rates = <666666666>, <250000000>;
> + clocks = <&scmi_clk IMX95_CLK_ENET>;
> + clock-names = "ipg";
> + status = "disabled";
> +
> + netc_bus0: pcie@4ca00000 {
> + compatible = "pci-host-ecam-generic";
> + reg = <0x0 0x4ca00000 0x0 0x100000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + bus-range = <0x0 0x0>;
> + msi-map = <0x0 &its 0x60 0x1>, //ENETC0 PF
> + <0x10 &its 0x61 0x1>, //ENETC0 VF0
> + <0x20 &its 0x62 0x1>, //ENETC0 VF1
> + <0x40 &its 0x63 0x1>, //ENETC1 PF
> + <0x80 &its 0x64 0x1>, //ENETC2 PF
> + <0x90 &its 0x65 0x1>, //ENETC2 VF0
> + <0xa0 &its 0x66 0x1>, //ENETC2 VF1
> + <0xc0 &its 0x67 0x1>; //NETC Timer
> + /* ENETC0~2 and Timer BAR0 - non-prefetchable memory */
> + ranges = <0x82000000 0x0 0x4cc00000 0x0 0x4cc00000 0x0 0xe0000
> + /* Timer BAR2 - prefetchable memory */
> + 0xc2000000 0x0 0x4cd00000 0x0 0x4cd00000 0x0 0x10000
> + /* ENETC0~2: VF0-1 BAR0 - non-prefetchable memory */
> + 0x82000000 0x0 0x4cd20000 0x0 0x4cd20000 0x0 0x60000
> + /* ENETC0~2: VF0-1 BAR2 - prefetchable memory */
> + 0xc2000000 0x0 0x4cd80000 0x0 0x4cd80000 0x0 0x60000>;
> +
> + enetc_port0: ethernet@0,0 {
> + compatible = "pci1131,e101";
> + reg = <0x000000 0 0 0 0>;
> + clocks = <&scmi_clk IMX95_CLK_ENETREF>;
> + clock-names = "ref";
> + status = "disabled";
> + };
> +
> + enetc_port1: ethernet@8,0 {
> + compatible = "pci1131,e101";
> + reg = <0x004000 0 0 0 0>;
> + clocks = <&scmi_clk IMX95_CLK_ENETREF>;
> + clock-names = "ref";
> + status = "disabled";
> + };
> +
> + enetc_port2: ethernet@10,0 {
> + compatible = "pci1131,e101";
> + reg = <0x008000 0 0 0 0>;
> + status = "disabled";
> + };
> +
> + netc_timer: ethernet@18,0 {
> + reg = <0x00c000 0 0 0 0>;
> + status = "disabled";
> + };
> + };
> +
> + netc_bus1: pcie@4cb00000 {
> + compatible = "pci-host-ecam-generic";
> + reg = <0x0 0x4cb00000 0x0 0x100000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + bus-range = <0x1 0x1>;
> + /* EMDIO BAR0 - non-prefetchable memory */
> + ranges = <0x82000000 0x0 0x4cce0000 0x0 0x4cce0000 0x0 0x20000
> + /* EMDIO BAR2 - prefetchable memory */
> + 0xc2000000 0x0 0x4cd10000 0x0 0x4cd10000 0x0 0x10000>;
> +
> + netc_emdio: mdio@0,0 {
> + compatible = "pci1131,ee00";
> + reg = <0x010000 0 0 0 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> + };
> + };
> };
> };
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-12-18 18:08 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-12-18 6:17 [PATCH 0/2] Add NETC support for i.MX95 Wei Fang
2024-12-18 6:17 ` [PATCH 1/2] arm64: dts: imx95: add NETC related nodes Wei Fang
2024-12-18 18:01 ` Frank Li
2024-12-18 18:06 ` Frank Li
2024-12-18 6:17 ` [PATCH 2/2] arm64: dts: imx95: add ENETC 0 support Wei Fang
2024-12-18 18:04 ` Frank Li
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