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From: Yao Zi <ziyao@disroot.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/5] dt-bindings: clock: Document clock and reset unit of RK3528
Date: Thu, 9 Jan 2025 09:16:12 +0000	[thread overview]
Message-ID: <Z3-T3JwcsW0xYKvk@pie> (raw)
In-Reply-To: <tep74dy3oc6y2wwhp6bthv6brhkge7cojzrtj6x53lvtsws4g5@areqtyxhyayq>

On Thu, Jan 09, 2025 at 09:59:25AM +0100, Krzysztof Kozlowski wrote:
> On Wed, Jan 08, 2025 at 11:46:02AM +0000, Yao Zi wrote:
> > There are two types of clocks in RK3528 SoC, CRU-managed and
> > SCMI-managed. Independent IDs are assigned to them.
> > 
> > For the reset part, differing from previous Rockchip SoCs and
> > downstream bindings which embeds register offsets into the IDs, gapless
> > numbers starting from zero are used.
> > 
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> >  .../bindings/clock/rockchip,rk3528-cru.yaml   |  67 +++
> >  .../dt-bindings/clock/rockchip,rk3528-cru.h   | 453 ++++++++++++++++++
> >  .../dt-bindings/reset/rockchip,rk3528-cru.h   | 241 ++++++++++
> >  3 files changed, 761 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> >  create mode 100644 include/dt-bindings/clock/rockchip,rk3528-cru.h
> >  create mode 100644 include/dt-bindings/reset/rockchip,rk3528-cru.h
> > 
> > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> > new file mode 100644
> > index 000000000000..19dbda858172
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> > @@ -0,0 +1,67 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/rockchip,rk3528-cru.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Rockchip RK3528 Clock and Reset Controller
> > +
> > +maintainers:
> > +  - Yao Zi <ziyao@disroot.org>
> > +
> > +description: |
> > +  The RK3528 clock controller generates the clock and also implements a reset
> > +  controller for SoC peripherals. For example, it provides SCLK_UART0 and
> > +  PCLK_UART0 as well as SRST_P_UART0 and SRST_S_UART0 for the first UART
> > +  module.
> > +  Each clock is assigned an identifier, consumer nodes can use it to specify
> > +  the clock. All available clock and reset IDs are defined in dt-binding
> > +  headers.
> > +
> > +properties:
> > +  compatible:
> > +    const: rockchip,rk3528-cru
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  assigned-clocks: true
> > +
> > +  assigned-clock-rates: true
> 
> Drop both, totally redundant.

Okay, will fix in next version.

> > +
> > +  clocks:
> > +    items:
> > +      - description: External 24MHz oscillator clock
> > +      - description: 50MHz clock generated by PHY module
> > +
> > +  clock-names:
> > +    items:
> > +      - const: xin24m
> > +      - const: gmac0
> 
> gmac
> (unless you have gmac1 here as well but then please add it now)

RK3528 comes with two onchip gmacs. This input clock is only used for
the first one and I think keeping the number would give the reader an
extra hint. What do you think about it?

> 
> Best regards,
> Krzysztof
> 

Thanks,
Yao Zi


  reply	other threads:[~2025-01-09  9:21 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-08 11:46 [PATCH v2 0/5] Support clock and reset unit of Rockchip RK3528 Yao Zi
2025-01-08 11:46 ` [PATCH v2 1/5] dt-bindings: clock: Document clock and reset unit of RK3528 Yao Zi
2025-01-09  8:59   ` Krzysztof Kozlowski
2025-01-09  9:16     ` Yao Zi [this message]
2025-01-09 11:39       ` Heiko Stübner
2025-01-10  7:42       ` Krzysztof Kozlowski
2025-01-11 16:32         ` Yao Zi
2025-01-08 11:46 ` [PATCH v2 2/5] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE Yao Zi
2025-01-08 11:46 ` [PATCH v2 3/5] clk: rockchip: Add clock controller driver for RK3528 SoC Yao Zi
2025-01-08 11:46 ` [PATCH v2 4/5] arm64: dts: rockchip: Add clock generators " Yao Zi
2025-01-08 11:46 ` [PATCH v2 5/5] arm64: dts: rockchip: Add UART clocks " Yao Zi
2025-01-08 11:56 ` [PATCH v2 0/5] Support clock and reset unit of Rockchip RK3528 Yao Zi

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