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charset=us-ascii Content-Disposition: inline In-Reply-To: <20250117032742.2990779-1-kever.yang@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250117_030032_998542_6E6B8B95 X-CRM114-Status: GOOD ( 18.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jan 17, 2025 at 11:27:41AM +0800, Kever Yang wrote: > rk3576 is using dwc controller, with msi interrupt directly to gic instead > of to gic its, so > - no its support is required and the 'msi-map' is not need anymore, > - a new 'msi' interrupt is needed. > > Signed-off-by: Kever Yang > --- > > Changes in v5: > - Add constraints per device for interrupt-names due to the interrupt is > different from rk3588. > > Changes in v4: > - Fix wrong indentation in dt_binding_check report by Rob > > Changes in v3: > - Fix dtb check broken on rk3588 > - Update commit message > > Changes in v2: > - remove required 'msi-map' > - add interrupt name 'msi' > > .../bindings/pci/rockchip-dw-pcie-common.yaml | 53 +++++++++++++++---- > .../bindings/pci/rockchip-dw-pcie.yaml | 4 +- > 2 files changed, 44 insertions(+), 13 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml > index cc9adfc7611c..eef108037184 100644 > --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml > +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml > @@ -40,6 +40,7 @@ properties: > > interrupts: > minItems: 5 > + maxItems: 9 > items: > - description: > Combined system interrupt, which is used to signal the following > @@ -64,6 +65,10 @@ properties: > interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout, > tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx, > nf_err_rx, f_err_rx, radm_qoverflow > + - description: > + Combinded MSI line interrupt, which is to support MSI interrupts > + output to GIC controller via GIC SPI interrupt instead of GIC its > + interrupt. If you are talking about GIC interrupt translation service here, then I think you should: s/GIC its/GIC ITS/ Kind regards, Niklas