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From: Mark Rutland <mark.rutland@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>, Fuad Tabba <tabba@google.com>
Subject: Re: [PATCH 06/18] KVM: arm64: Plug FEAT_GCS handling
Date: Tue, 11 Feb 2025 12:36:35 +0000	[thread overview]
Message-ID: <Z6tEUzwcHVHALIdu@J2N7QTR9R3> (raw)
In-Reply-To: <20250210184150.2145093-7-maz@kernel.org>

On Mon, Feb 10, 2025 at 06:41:37PM +0000, Marc Zyngier wrote:
> We don't seem to be handling the GCS-specific exception class.
> Handle it by delivering an UNDEF to the guest, and populate the
> relevant trap bits.
> 
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
>  arch/arm64/kvm/handle_exit.c | 11 +++++++++++
>  arch/arm64/kvm/sys_regs.c    |  8 ++++++++
>  2 files changed, 19 insertions(+)
> 
> diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
> index 4f8354bf7dc5f..624a78a99e38a 100644
> --- a/arch/arm64/kvm/handle_exit.c
> +++ b/arch/arm64/kvm/handle_exit.c
> @@ -294,6 +294,16 @@ static int handle_svc(struct kvm_vcpu *vcpu)
>  	return 1;
>  }
>  
> +static int kvm_handle_gcs(struct kvm_vcpu *vcpu)
> +{
> +	/* We don't expect GCS, so treat it with contempt */
> +	if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, GCS, IMP))
> +		WARN_ON_ONCE(1);

Just to check / better my understanging, do we enforce that this can't
be exposed to the guest somewhere?

I see __kvm_read_sanitised_id_reg() masks it out, and the sys_reg_descs
table has it filtered, but I'm not immediately sure whether that
prevents host userspace maliciously setting this?

Otherwise this looks good to me.

Mark.

> +
> +	kvm_inject_undefined(vcpu);
> +	return 1;
> +}
> +
>  static int handle_ls64b(struct kvm_vcpu *vcpu)
>  {
>  	struct kvm *kvm = vcpu->kvm;
> @@ -384,6 +394,7 @@ static exit_handle_fn arm_exit_handlers[] = {
>  	[ESR_ELx_EC_BRK64]	= kvm_handle_guest_debug,
>  	[ESR_ELx_EC_FP_ASIMD]	= kvm_handle_fpasimd,
>  	[ESR_ELx_EC_PAC]	= kvm_handle_ptrauth,
> +	[ESR_ELx_EC_GCS]	= kvm_handle_gcs,
>  };
>  
>  static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 18721c773475d..2ecd0d51a2dae 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -5056,6 +5056,14 @@ void kvm_calculate_traps(struct kvm_vcpu *vcpu)
>  						HFGITR_EL2_nBRBIALL);
>  	}
>  
> +	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, GCS, IMP)) {
> +		kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nGCS_EL0 |
> +						HFGxTR_EL2_nGCS_EL1);
> +		kvm->arch.fgu[HFGITR_GROUP] |= (HFGITR_EL2_nGCSPUSHM_EL1 |
> +						HFGITR_EL2_nGCSSTR_EL1 |
> +						HFGITR_EL2_nGCSEPP);
> +	}
> +
>  	set_bit(KVM_ARCH_FLAG_FGU_INITIALIZED, &kvm->arch.flags);
>  out:
>  	mutex_unlock(&kvm->arch.config_lock);
> -- 
> 2.39.2
> 


  reply	other threads:[~2025-02-11 13:07 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-10 18:41 [PATCH 00/18] KVM: arm64: Revamp Fine Grained Trap handling Marc Zyngier
2025-02-10 18:41 ` [PATCH 01/18] arm64: Add ID_AA64ISAR1_EL1.LS64 encoding for FEAT_LS64WB Marc Zyngier
2025-02-10 18:41 ` [PATCH 02/18] arm64: Add syndrome information for trapped LD64B/ST64B{,V,V0} Marc Zyngier
2025-02-11 12:23   ` Mark Rutland
2025-02-10 18:41 ` [PATCH 03/18] KVM: arm64: Handle trapping of FEAT_LS64* instructions Marc Zyngier
2025-02-11 12:28   ` Mark Rutland
2025-03-04 14:36   ` Fuad Tabba
2025-03-04 15:25     ` Marc Zyngier
2025-03-04 15:47     ` Marc Zyngier
2025-02-10 18:41 ` [PATCH 04/18] KVM: arm64: Restrict ACCDATA_EL1 undef to FEAT_ST64_ACCDATA being disabled Marc Zyngier
2025-02-10 18:41 ` [PATCH 05/18] KVM: arm64: Don't treat HCRX_EL2 as a FGT register Marc Zyngier
2025-02-10 18:41 ` [PATCH 06/18] KVM: arm64: Plug FEAT_GCS handling Marc Zyngier
2025-02-11 12:36   ` Mark Rutland [this message]
2025-02-11 13:35     ` Marc Zyngier
2025-02-11 13:47       ` Mark Rutland
2025-02-10 18:41 ` [PATCH 07/18] KVM: arm64: Compute FGT masks from KVM's own FGT tables Marc Zyngier
2025-03-04 16:55   ` Fuad Tabba
2025-03-10 11:42     ` Marc Zyngier
2025-03-11 19:10     ` Marc Zyngier
2025-02-10 18:41 ` [PATCH 08/18] KVM: arm64: Add description of FGT bits leading to EC!=0x18 Marc Zyngier
2025-02-10 18:41 ` [PATCH 09/18] KVM: arm64: Use computed masks as sanitisers for FGT registers Marc Zyngier
2025-02-10 18:41 ` [PATCH 10/18] KVM: arm64: Unconditionally configure fine-grain traps Marc Zyngier
2025-02-10 18:41 ` [PATCH 11/18] KVM: arm64: Propagate FGT masks to the nVHE hypervisor Marc Zyngier
2025-02-10 18:41 ` [PATCH 12/18] KVM: arm64: Use computed FGT masks to setup FGT registers Marc Zyngier
2025-02-10 18:41 ` [PATCH 13/18] KVM: arm64: Remove most hand-crafted masks for " Marc Zyngier
2025-02-10 18:41 ` [PATCH 14/18] KVM: arm64: Use KVM-specific HCRX_EL2 RES0 mask Marc Zyngier
2025-02-10 18:41 ` [PATCH 15/18] KVM: arm64: Handle PSB CSYNC traps Marc Zyngier
2025-02-10 18:41 ` [PATCH 16/18] KVM: arm64: Switch to table-driven FGU configuration Marc Zyngier
2025-02-10 18:41 ` [PATCH 17/18] KVM: arm64: Validate FGT register descriptions against RES0 masks Marc Zyngier
2025-02-10 18:41 ` [PATCH 18/18] KVM: arm64: Use FGT feature maps to drive RES0 bits Marc Zyngier

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