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micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="l8/woIF9RLKv3zSp" Content-Disposition: inline In-Reply-To: X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --l8/woIF9RLKv3zSp Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > On Wed, Feb 19, 2025 at 11:56:50PM +0530, Manivannan Sadhasivam wrote: > > On Sun, Feb 02, 2025 at 08:34:24PM +0100, Lorenzo Bianconi wrote: > > > Configure PBus base address and address mask to allow the hw > > > to detect if a given address is on PCIE0, PCIE1 or PCIE2. > > > > > > Signed-off-by: Lorenzo Bianconi > > > > Reviewed-by: Manivannan Sadhasivam > > > > - Mani > > > > > --- > > > drivers/pci/controller/pcie-mediatek-gen3.c | 30 +++++++++++++++++++= +++++++++- > > > 1 file changed, 29 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pc= i/controller/pcie-mediatek-gen3.c > > > index aa24ac9aaecc749b53cfc4faf6399913d20cdbf2..9c2a592cae959de8fbe9c= a5c5c2253f8eadf2c76 100644 > > > --- a/drivers/pci/controller/pcie-mediatek-gen3.c > > > +++ b/drivers/pci/controller/pcie-mediatek-gen3.c > > > @@ -15,6 +15,7 @@ > > > #include > > > #include > > > #include > > > +#include > > > #include > > > #include > > > #include > > > @@ -24,6 +25,7 @@ > > > #include > > > #include > > > #include > > > +#include > > > #include > > > > > > #include "../pci.h" > > > @@ -127,6 +129,13 @@ > > > > > > #define PCIE_MTK_RESET_TIME_US 10 > > > > > > +#define PCIE_EN7581_PBUS_ADDR(_n) (0x00 + ((_n) << 3)) > > > +#define PCIE_EN7581_PBUS_ADDR_MASK(_n) (0x04 + ((_n) << 3)) > > > +#define PCIE_EN7581_PBUS_BASE_ADDR(_n) \ > > > + ((_n) =3D=3D 2 ? 0x28000000 : \ > > > + (_n) =3D=3D 1 ? 0x24000000 : 0x20000000) >=20 > look like these data should be in dts ? >=20 > > > +#define PCIE_EN7581_PBUS_BASE_ADDR_MASK GENMASK(31, 26) > > > + > > > /* Time in ms needed to complete PCIe reset on EN7581 SoC */ > > > #define PCIE_EN7581_RESET_TIME_MS 100 > > > > > > @@ -931,7 +940,8 @@ static int mtk_pcie_parse_port(struct mtk_gen3_pc= ie *pcie) > > > static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) > > > { > > > struct device *dev =3D pcie->dev; > > > - int err; > > > + struct regmap *map; > > > + int err, slot; > > > u32 val; > > > > > > /* > > > @@ -945,6 +955,24 @@ static int mtk_pcie_en7581_power_up(struct mtk_g= en3_pcie *pcie) > > > /* Wait for the time needed to complete the reset lines assert. */ > > > msleep(PCIE_EN7581_RESET_TIME_MS); > > > > > > + map =3D syscon_regmap_lookup_by_phandle(dev->of_node, > > > + "mediatek,pbus-csr"); > > > + if (IS_ERR(map)) > > > + return PTR_ERR(map); > > > + > > > + /* > > > + * Configure PBus base address and address mask to allow the > > > + * hw to detect if a given address is on PCIE0, PCIE1 or PCIE2. > > > + */ > > > + slot =3D of_get_pci_domain_nr(dev->of_node); >=20 > I am not sure if too much abuse domain_id here. >=20 > > > + if (slot < 0) > > > + return slot; > > > + > > > + regmap_write(map, PCIE_EN7581_PBUS_ADDR(slot), > > > + PCIE_EN7581_PBUS_BASE_ADDR(slot)); > > > + regmap_write(map, PCIE_EN7581_PBUS_ADDR_MASK(slot), > > > + PCIE_EN7581_PBUS_BASE_ADDR_MASK); >=20 > look like > syscon > { > csr1 : csr1 =3D > { > reg =3D <0x20000000, >; //or other property > } >=20 > csr2: csr2 =3D > { > .... > } > } >=20 > pcie1 { > mediatek,pbus-csr =3D <&csr1>; > } >=20 > pcie2 { > mediatek,pbus-csr =3D <&csr2>; > } >=20 > ... >=20 > Or > pcie1 { > mediatek,pbus-csr =3D <&csr1 0x20000000>; > } > ... >=20 > you can use syscon_regmap_lookup_by_phandle_args() to get address. > Frank ack, thx for the pointer. I will fix in v3. Regards, Lorenzo >=20 >=20 > > > + > > > /* > > > * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581 > > > * requires PHY initialization and power-on before PHY reset deasse= rt. > > > > > > -- > > > 2.48.1 > > > > > > > -- > > =E0=AE=AE=E0=AE=A3=E0=AE=BF=E0=AE=B5=E0=AE=A3=E0=AF=8D=E0=AE=A3=E0=AE= =A9=E0=AF=8D =E0=AE=9A=E0=AE=A4=E0=AE=BE=E0=AE=9A=E0=AE=BF=E0=AE=B5=E0=AE= =AE=E0=AF=8D --l8/woIF9RLKv3zSp Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCZ7evOgAKCRA6cBh0uS2t rMtVAQDt7OKvwzSWH4diA2tOPVBk9hZhWEwF4ifot/vwEVB59AD8CJkJDxC/ETkp 7PzGTuXjh57IZJMnuAyy//jgFLBZfgo= =lyct -----END PGP SIGNATURE----- --l8/woIF9RLKv3zSp--