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From: Frank Li <Frank.li@nxp.com>
To: Marc Zyngier <maz@kernel.org>
Cc: "Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Anup Patel" <apatel@ventanamicro.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Arnd Bergmann" <arnd@arndb.de>, "Shuah Khan" <shuah@kernel.org>,
	"Richard Zhu" <hongxing.zhu@nxp.com>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Pengutronix Kernel Team" <kernel@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Niklas Cassel" <cassel@kernel.org>,
	dlemoal@kernel.org, jdmason@kudzu.us,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	linux-kselftest@vger.kernel.org, imx@lists.linux.dev,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v15 04/15] irqchip/gic-v3-its: Add support for device tree msi-map and msi-mask
Date: Mon, 3 Mar 2025 11:52:47 -0500	[thread overview]
Message-ID: <Z8XeXxg5WhDpcAoo@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <86o6ylouc5.wl-maz@kernel.org>

On Sat, Mar 01, 2025 at 11:37:14AM +0000, Marc Zyngier wrote:
> On Tue, 11 Feb 2025 19:21:57 +0000,
> Frank Li <Frank.Li@nxp.com> wrote:
> >
> > Some platform devices create child devices dynamically and require the
> > parent device's msi-map to map device IDs to actual sideband information.
> >
> > A typical use case is using ITS as a PCIe Endpoint Controller(EPC)'s
> > doorbell function, where PCI hosts send TLP memory writes to the EP
> > controller. The EP controller converts these writes to AXI transactions
> > and appends platform-specific sideband information.  See below figure.
> >
> >                ┌────────────────────────────────┐
> >                │                                │
> >                │     PCI Endpoint Controller    │
> >                │                                │
> >                │  ┌─────┐   ┌─────┐     ┌─────┐ │
> >     PCI Bus    │  │     │   │     │     │     │ │
> >     ─────────► │  │Func1│   │Func2│ ... │Func │ │
> >     TLP Memory │  │     │   │     │     │<n>  │ │
> >     Write Push │  │     │   │     │     │     │ │
> >     DoorBell   │  └─┬─┬─┘   └──┬──┘     └──┬──┘ │
> >                │    │ │        │           │    │
> >                └────┼─┼────────┼───────────┼────┘
> >         sideband    │ │ Address│           │
> >         information ▼ ▼ /Data  ▼           ▼
> >                    ┌────────────────────────┐
> >                    │    MSI Controller      │
> >                    └────────────────────────┘
> >
>
> Please stop using these figures in commit messages. I don't think they
> help, and they are not in consistent with the way the commit messages
> are managed.

Okay

>
> > EPC's DTS will provide such information by msi-map and msi-mask. A
> > simplified dts as
> >
> > pcie-ep@10000000 {
> > 	...
> > 	msi-map = <0 &its 0xc 8>;
> >                           ^^^ 0xc is implement defined sideband information,
> > 			      which append to AXI write transaction.
> > 	           ^ 0 is function index.
>
> What does this sideband field represent?

ARM ITS use term "streamid" for this sideband field, which indicate which
MSI consumer write to address/data pair on bus. Such as PCI1 or PCI2.

> How is the ITS driver
> supposed to use that data?

ITS use a as devid, or info->scratchpad[0].ul = dev_id;
msi-map actually given a start dev_id (it is 0xc in example) for fuction0.
function1 will use dev_id + 1 ...

> Is it the full devid as presented to the
> ITS?

Yes,

> Something combined with the "function index"? Is the "function
> index" a full RID, as defined in the documentation?

Not a full RID. RID is related with host PCIe's topology. The EP function's
RID may 1:00:01 at PC1, 3:00:01 at the another PC.

So Endpoint driver can't use RID directly. It should related function and
virtual function number only.

PCI define 8 physicla funciton, and 64000 virutal function. Define device
id as vfunc[31:3], pfunc[2:0] as msi-map's input. DTS provide information
how map it to real streamid.

>
> Also, msi-map is so far reserved to a PCIe RC, not this sort of wonky
> contraption. This needs to be documented.

Okay, I can update document.

Frank
>
> >
> > 	msi-mask = <0x7>
> > }
> >
> > Check msi-map if msi-parent missed to keep compatility with existed system.
> >
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> > change from v14 to v15
> > - none
> >
> > change from v13 to v14
> > new patch
> > ---
> >  drivers/irqchip/irq-gic-v3-its-msi-parent.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/irqchip/irq-gic-v3-its-msi-parent.c b/drivers/irqchip/irq-gic-v3-its-msi-parent.c
> > index e150365fbe892..6c7389bb84a4a 100644
> > --- a/drivers/irqchip/irq-gic-v3-its-msi-parent.c
> > +++ b/drivers/irqchip/irq-gic-v3-its-msi-parent.c
> > @@ -118,6 +118,14 @@ static int of_pmsi_get_dev_id(struct irq_domain *domain, struct device *dev,
> >  		index++;
> >  	} while (!ret);
> >
> > +	if (ret) {
> > +		struct device_node *np = NULL;
> > +
> > +		ret = of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &np, dev_id);
> > +		if (np)
> > +			of_node_put(np);
> > +	}
> > +
> >  	return ret;
> >  }
> >
> >
>
> Thanks,
>
> 	M.
>
> --
> Without deviation from the norm, progress is not possible.


  reply	other threads:[~2025-03-03 16:56 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-11 19:21 [PATCH v15 00/15] PCI: EP: Add RC-to-EP doorbell with platform MSI controller Frank Li
2025-02-11 19:21 ` [PATCH v15 01/15] platform-msi: Add msi_remove_device_irq_domain() in platform_device_msi_free_irqs_all() Frank Li
2025-03-01 12:17   ` Marc Zyngier
2025-02-11 19:21 ` [PATCH v15 02/15] irqdomain: Add IRQ_DOMAIN_FLAG_MSI_IMMUTABLE and irq_domain_is_msi_immutable() Frank Li
2025-03-01 11:10   ` Marc Zyngier
2025-03-03 17:01     ` Frank Li
2025-02-11 19:21 ` [PATCH v15 03/15] irqchip/gic-v3-its: Set IRQ_DOMAIN_FLAG_MSI_IMMUTABLE for ITS Frank Li
2025-02-11 19:21 ` [PATCH v15 04/15] irqchip/gic-v3-its: Add support for device tree msi-map and msi-mask Frank Li
2025-03-01 11:37   ` Marc Zyngier
2025-03-03 16:52     ` Frank Li [this message]
2025-02-11 19:21 ` [PATCH v15 05/15] PCI: endpoint: Set ID and of_node for function driver Frank Li
2025-02-11 19:21 ` [PATCH v15 06/15] PCI: endpoint: Add RC-to-EP doorbell support using platform MSI controller Frank Li
2025-02-11 19:22 ` [PATCH v15 07/15] PCI: endpoint: pci-ep-msi: Add MSI address/data pair mutable check Frank Li
2025-03-01 11:44   ` Marc Zyngier
2025-03-03 16:27     ` Frank Li
2025-02-11 19:22 ` [PATCH v15 08/15] PCI: endpoint: Add pci_epf_align_inbound_addr() helper for address alignment Frank Li
2025-02-11 19:22 ` [PATCH v15 09/15] PCI: endpoint: pci-epf-test: Add doorbell test support Frank Li
2025-02-11 19:22 ` [PATCH v15 10/15] misc: pci_endpoint_test: Add doorbell test case Frank Li
2025-02-11 19:22 ` [PATCH v15 11/15] selftests: pci_endpoint: " Frank Li
2025-02-11 19:22 ` [PATCH v15 12/15] pci: imx6: Add helper function imx_pcie_add_lut_by_rid() Frank Li
2025-02-11 19:22 ` [PATCH v15 13/15] pci: imx6: Add LUT setting for MSI/IOMMU in Endpoint mode Frank Li
2025-02-11 19:22 ` [PATCH v15 14/15] arm64: dts: imx95: Add msi-map for pci-ep device Frank Li
2025-02-11 19:22 ` [PATCH v15 15/15] arm64: dts: imx95-19x19-evk: Add PCIe1 endpoint function overlay file Frank Li
2025-02-20 20:01 ` [PATCH v15 00/15] PCI: EP: Add RC-to-EP doorbell with platform MSI controller Frank Li
2025-02-20 20:42   ` Thomas Gleixner
2025-02-28 17:07     ` Frank Li
2025-03-01 12:02   ` Marc Zyngier
2025-03-01 18:09     ` Thomas Gleixner
2025-03-10 21:08       ` Frank Li

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