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Mon, 03 Mar 2025 13:03:17 -0800 (PST) Received: from debian ([2607:fb90:37e1:4bed:f057:b35a:e3e2:4c5f]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73630744c23sm5969768b3a.15.2025.03.03.13.03.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 13:03:16 -0800 (PST) From: Fan Ni X-Google-Original-From: Fan Ni Date: Mon, 3 Mar 2025 13:03:12 -0800 To: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= Cc: Fan Ni , Shradha Todi , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org, robh@kernel.org, bhelgaas@google.com, jingoohan1@gmail.com, Jonathan.Cameron@huawei.com, a.manzanares@samsung.com, pankaj.dubey@samsung.com, cassel@kernel.org, 18255117159@163.com, xueshuai@linux.alibaba.com, renyu.zj@linux.alibaba.com, will@kernel.org, mark.rutland@arm.com Subject: Re: [PATCH v7 5/5] Add debugfs based statistical counter support in DWC Message-ID: References: <20250221131548.59616-1-shradha.t@samsung.com> <20250221131548.59616-6-shradha.t@samsung.com> <20250303194228.GB1552306@rocinante> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250303194228.GB1552306@rocinante> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250303_130318_279999_9CFBA74C X-CRM114-Status: GOOD ( 14.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Mar 04, 2025 at 04:42:28AM +0900, Krzysztof Wilczyński wrote: > Hello, > > [...] > > > +static ssize_t counter_value_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) > > > +{ > > > + struct dwc_pcie_rasdes_priv *pdata = file->private_data; > > > + struct dw_pcie *pci = pdata->pci; > > > + struct dwc_pcie_rasdes_info *rinfo = pci->debugfs->rasdes_info; > > > + char debugfs_buf[DWC_DEBUGFS_BUF_MAX]; > > > + ssize_t pos; > > > + u32 val; > > > + > > > + mutex_lock(&rinfo->reg_event_lock); > > > + set_event_number(pdata, pci, rinfo); > > > + val = dw_pcie_readl_dbi(pci, rinfo->ras_cap_offset + RAS_DES_EVENT_COUNTER_DATA_REG); > > > + mutex_unlock(&rinfo->reg_event_lock); > > > + pos = scnprintf(debugfs_buf, DWC_DEBUGFS_BUF_MAX, "Counter value: %d\n", val); > > > + > > > + return simple_read_from_buffer(buf, count, ppos, debugfs_buf, pos); > > > +} > > > > Do we need to check whether the counter is enabled or not for the event > > before retrieving the counter value? > > I believe, we have a patch that aims to address, have a look at: > > https://lore.kernel.org/linux-pci/20250225171239.19574-1-manivannan.sadhasivam@linaro.org Maybe I missed something, that seems to fix counter_enable_read(), but here is to retrieve counter value. How dw_pcie_readl_dbi() can return something like "Counter Disabled"? Fan > > Thank you! > > Krzysztof