From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 42DE7C282EC for ; Tue, 11 Mar 2025 14:51:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=kHx9MMe0I+IhuCYlFT1sS6UaInxKAWS8UcRErdt1woY=; b=a+1cTnruuRS8Zvoip/u2+AUF+o ezsfhxzjMhb/SPvQ+uRl+XGcVy/iYJAA+sPR4hUyQRJzRA37o3WZXbC8ERYmEQcUq4491/WkzdVw2 eFv2HHXa/CsQwJ99Ccbp1VWUnPSVmvMY6HEGZby+weDq32YL5XcDYaka4yGsUOhPpSKdxWDkYpFdd e5zzuJRdLkQRsr3H/yBHlKlARJdEQk4U3RdYw821tDX1eFPL2mFoGC3wUBOQKx7SJN0LA/ypgjVuk /BZ4Ryg35+K4+HAUDlzdAT/JB4b6CGhV9esvNr2Choaz7ZOZAiFoU/AojjKlkpRHk/AghV3pcrQzu vl7jn+Jw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1ts0wW-000000062KG-3Cdz; Tue, 11 Mar 2025 14:50:52 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1ts0oY-000000061Ez-0usJ for linux-arm-kernel@lists.infradead.org; Tue, 11 Mar 2025 14:42:39 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8BB3F27B5; Tue, 11 Mar 2025 07:42:46 -0700 (PDT) Received: from bogus (e133711.arm.com [10.1.196.55]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 61E293F694; Tue, 11 Mar 2025 07:42:31 -0700 (PDT) Date: Tue, 11 Mar 2025 14:42:28 +0000 From: Sudeep Holla To: Yicong Yang Cc: , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v12 3/4] arm64: topology: Support SMT control on ACPI based system Message-ID: References: <20250311075143.61078-1-yangyicong@huawei.com> <20250311075143.61078-4-yangyicong@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250311075143.61078-4-yangyicong@huawei.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_074238_299442_692AB081 X-CRM114-Status: GOOD ( 15.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Mar 11, 2025 at 03:51:42PM +0800, Yicong Yang wrote: > From: Yicong Yang > > For ACPI we'll build the topology from PPTT and we cannot directly > get the SMT number of each core. Instead using a temporary xarray > to record the heterogeneous information (from ACPI_PPTT_ACPI_IDENTICAL) > and SMT information of the first core in its heterogeneous CPU cluster > when building the topology. Then we can know the largest SMT number > in the system. If a homogeneous system's using ACPI 6.2 or later, > all the CPUs should be under the root node of PPTT. There'll be > only one entry in the xarray and all the CPUs in the system will > be assumed identical. > > The framework's SMT control provides two interface to the users [1] > through /sys/devices/system/cpu/smt/control: > 1) enable SMT by writing "on" and disable by "off" > 2) enable SMT by writing max_thread_number or disable by writing 1 > > Both method support to completely disable/enable the SMT cores so both > work correctly for symmetric SMT platform and asymmetric platform with > non-SMT and one type SMT cores like: > core A: 1 thread > core B: X (X!=1) threads > > Note that for a theoretically possible multiple SMT-X (X>1) core > platform the SMT control is also supported as expected but only > by writing the "on/off" method. > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu#n542 Ditto, just path please. Reviewed-by: Sudeep Holla -- Regards, Sudeep