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[213.179.129.39]) by smtp.gmail.com with ESMTPSA id r2-20020adff702000000b002c573cff730sm7482799wrp.68.2023.03.16.08.19.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 08:19:54 -0700 (PDT) Date: Thu, 16 Mar 2023 16:19:52 +0100 From: Jiri Pirko To: "Kubalewski, Arkadiusz" Cc: Vadim Fedorenko , Jakub Kicinski , Jonathan Lemon , Paolo Abeni , Vadim Fedorenko , poros , mschmidt , "netdev@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" , "Michalik, Michal" Subject: Re: [PATCH RFC v6 1/6] dpll: spec: Add Netlink spec in YAML Message-ID: References: <20230312022807.278528-1-vadfed@meta.com> <20230312022807.278528-2-vadfed@meta.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230316_082001_234946_8BDB795D X-CRM114-Status: UNSURE ( 9.56 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Thu, Mar 16, 2023 at 02:45:10PM CET, jiri@resnulli.us wrote: >Thu, Mar 16, 2023 at 02:15:59PM CET, arkadiusz.kubalewski@intel.com wrote: [...] >>>>+ flags: [ admin-perm ] >>>>+ >>>>+ do: >>>>+ pre: dpll-pre-doit >>>>+ post: dpll-post-doit >>>>+ request: >>>>+ attributes: >>>>+ - id >>>>+ - bus-name >>>>+ - dev-name >>>>+ - mode >>> >>>Hmm, shouldn't source-pin-index be here as well? >> >>No, there is no set for this. >>For manual mode user selects the pin by setting enabled state on the one >>he needs to recover signal from. >> >>source-pin-index is read only, returns active source. > >Okay, got it. Then why do we have this assymetric approach? Just have >the enabled state to serve the user to see which one is selected, no? >This would help to avoid confusion (like mine) and allow not to create >inconsistencies (like no pin enabled yet driver to return some source >pin index) Actually, for mlx5 implementation, would be non-trivial to implement this, as each of the pin/port is instantiated and controlled by separate pci backend. Could you please remove, it is not needed and has potential and real issues. [...] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel