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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Apr 04, 2023 at 04:42:24PM +0300, Yair Podemsky wrote: > @@ -191,6 +192,20 @@ static void tlb_remove_table_smp_sync(void *arg) > /* Simply deliver the interrupt */ > } > > + > +#ifdef CONFIG_CONTEXT_TRACKING > +static bool cpu_in_kernel(int cpu, void *info) > +{ > + struct context_tracking *ct = per_cpu_ptr(&context_tracking, cpu); Like Peter said, an smp_mb() is required here before the read (unless there is already one between the page table modification and that ct->state read?). So that you have this pairing: WRITE page_table WRITE ct->state smp_mb() smp_mb() // implied by atomic_fetch_or READ ct->state READ page_table > + int state = atomic_read(&ct->state); > + /* will return true only for cpus in kernel space */ > + return state & CT_STATE_MASK == CONTEXT_KERNEL; > +} Also note that this doesn't stricly prevent userspace from being interrupted. You may well observe the CPU in kernel but it may receive the IPI later after switching to userspace. We could arrange for avoiding that with marking ct->state with a pending work bit to flush upon user entry/exit but that's a bit more overhead so I first need to know about your expectations here, ie: can you tolerate such an occasional interruption or not? Thanks. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel