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Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pgqJr-00BqGH-2i; Mon, 27 Mar 2023 17:07:43 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pgqJg-00BqAs-1v for linux-arm-kernel@lists.infradead.org; Mon, 27 Mar 2023 17:07:34 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 06724B81091; Mon, 27 Mar 2023 17:07:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DD94FC433EF; Mon, 27 Mar 2023 17:07:27 +0000 (UTC) Date: Mon, 27 Mar 2023 18:07:24 +0100 From: Catalin Marinas To: Joey Gouly Cc: linux-arm-kernel@lists.infradead.org, nd@arm.com, broonie@kernel.org, james.morse@arm.com, mark.rutland@arm.com, maz@kernel.org, oliver.upton@linux.dev, suzuki.poulose@arm.com, will@kernel.org, yuzenghui@huawei.com Subject: Re: [PATCH v1 16/18] arm64: add encodings of PIRx_ELx registers Message-ID: References: <20230309145246.22787-1-joey.gouly@arm.com> <20230309145246.22787-17-joey.gouly@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230309145246.22787-17-joey.gouly@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230327_100732_776459_40555A25 X-CRM114-Status: GOOD ( 13.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Mar 09, 2023 at 02:52:44PM +0000, Joey Gouly wrote: > diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h > index f658aafc47df..11c81e700335 100644 > --- a/arch/arm64/include/asm/pgtable-hwdef.h > +++ b/arch/arm64/include/asm/pgtable-hwdef.h > @@ -170,6 +170,14 @@ > #define PTE_ATTRINDX(t) (_AT(pteval_t, (t)) << 2) > #define PTE_ATTRINDX_MASK (_AT(pteval_t, 7) << 2) > > +/* > + * PIIndex[3:0] encoding (Permission Indirection Extension) > + */ > +#define PTE_PI_IDX_0 6 > +#define PTE_PI_IDX_1 51 > +#define PTE_PI_IDX_2 53 > +#define PTE_PI_IDX_3 54 > + > /* > * Memory Attribute override for Stage-2 (MemAttr[3:0]) > */ > diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h > index a45af0a22b25..2b192da1ef9d 100644 > --- a/arch/arm64/include/asm/pgtable-prot.h > +++ b/arch/arm64/include/asm/pgtable-prot.h > @@ -107,4 +107,22 @@ extern bool arm64_use_ng_mappings; > > #endif /* __ASSEMBLY__ */ > > +#define PIE_E0 ( \ > + PIRx_ELx_PERMIDX(PIE_X_O, pte_pi_index(_PAGE_EXECONLY)) | \ > + PIRx_ELx_PERMIDX(PIE_RX, pte_pi_index(_PAGE_READONLY_EXEC)) | \ > + PIRx_ELx_PERMIDX(PIE_RWX, pte_pi_index(_PAGE_SHARED_EXEC)) | \ > + PIRx_ELx_PERMIDX(PIE_R, pte_pi_index(_PAGE_READONLY)) | \ > + PIRx_ELx_PERMIDX(PIE_RW, pte_pi_index(_PAGE_SHARED))) > + > +#define PIE_E1 ( \ > + PIRx_ELx_PERMIDX(PIE_NONE_O, pte_pi_index(_PAGE_EXECONLY)) | \ > + PIRx_ELx_PERMIDX(PIE_R, pte_pi_index(_PAGE_READONLY_EXEC)) | \ > + PIRx_ELx_PERMIDX(PIE_RW, pte_pi_index(_PAGE_SHARED_EXEC)) | \ > + PIRx_ELx_PERMIDX(PIE_R, pte_pi_index(_PAGE_READONLY)) | \ > + PIRx_ELx_PERMIDX(PIE_RW, pte_pi_index(_PAGE_SHARED)) | \ > + PIRx_ELx_PERMIDX(PIE_RX, pte_pi_index(_PAGE_KERNEL_ROX)) | \ > + PIRx_ELx_PERMIDX(PIE_RWX, pte_pi_index(_PAGE_KERNEL_EXEC)) | \ > + PIRx_ELx_PERMIDX(PIE_R, pte_pi_index(_PAGE_KERNEL_RO)) | \ > + PIRx_ELx_PERMIDX(PIE_RW, pte_pi_index(_PAGE_KERNEL))) > + > #endif /* __ASM_PGTABLE_PROT_H */ > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index b6ba466e2e8a..b31d39f22803 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -26,6 +26,12 @@ > > #define vmemmap ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT)) > > +#define pte_pi_index(pte) ( \ > + ((pte & BIT(PTE_PI_IDX_3)) >> (PTE_PI_IDX_3 - 3)) | \ > + ((pte & BIT(PTE_PI_IDX_2)) >> (PTE_PI_IDX_2 - 2)) | \ > + ((pte & BIT(PTE_PI_IDX_1)) >> (PTE_PI_IDX_1 - 1)) | \ > + ((pte & BIT(PTE_PI_IDX_0)) >> (PTE_PI_IDX_0 - 0))) You might as well keep this macro with the PIE_E0/E1 definitions above. Reviewed-by: Catalin Marinas _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel