From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC6E3C77B60 for ; Mon, 3 Apr 2023 07:25:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2Gd/GmSe15f4L+LogWfeOXodrdvWxTShadiBrPfsdHs=; b=oM7ppZcAAOzUTI 5wFpKGS4jj9bPmpeI6itbiZ3pdO0rRqryC4mgcGKBQIv4RDuOvxTOi3YDCfKR+OckwnNG1y8fd9Fl rGF/42aND5uE1FvSwJ8y0NZIukAhDxjvCQXkqOA1yViMvoi9UHAjUN1wwRnJJPmv00SBWWHNd9ssR irMU3xtQZCtogtvyOMa4EobtMpuw6zumrnReGn7fMbzf7Bw2Mj/rlmXO12CybEDeZsCnKUUH7F9DO Ezugzft+rdLas5vHkvK5IqoiGyNSk2Eb/1LJizxKXbq93DeE0rF3WzLIwFZxT8yXNg/ve4CYhdRsM Uv6Ydgg7YS2MIWBxiGbg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pjEYH-00ENT2-0a; Mon, 03 Apr 2023 07:24:29 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pjEYD-00ENPo-3A for linux-arm-kernel@lists.infradead.org; Mon, 03 Apr 2023 07:24:28 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1665BFEC; Mon, 3 Apr 2023 00:25:06 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.57.89]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EAB463F6C4; Mon, 3 Apr 2023 00:24:18 -0700 (PDT) Date: Mon, 3 Apr 2023 08:24:13 +0100 From: Mark Rutland To: Peter Newman Cc: linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, alexander.shishkin@linux.intel.com, jolsa@kernel.org, namhyung@kernel.org, irogers@google.com, adrian.hunter@intel.com, will@kernel.org, catalin.marinas@arm.com, eranian@google.com Subject: Re: [PATCH v4] arm64: pmuv3: dynamically map PERF_COUNT_HW_BRANCH_INSTRUCTIONS Message-ID: References: <20230327122527.3913496-1-peternewman@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230327122527.3913496-1-peternewman@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230403_002426_117746_6244E24E X-CRM114-Status: GOOD ( 27.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Mar 27, 2023 at 02:25:27PM +0200, Peter Newman wrote: > From: Stephane Eranian > > The mapping of perf_events generic hardware events to actual PMU events on > ARM PMUv3 may not always be correct. This is in particular true for the > PERF_COUNT_HW_BRANCH_INSTRUCTIONS event. Although the mapping points to an > architected event, it may not always be available. This can be seen with a > simple: > > $ perf stat -e branches sleep 0 > Performance counter stats for 'sleep 0': > > branches > > 0.001401081 seconds time elapsed > > Yet the hardware does have an event that could be used for branches. > > Dynamically check for a supported hardware event which can be used for > PERF_COUNT_HW_BRANCH_INSTRUCTIONS at mapping time. > > And with that: > > $ perf stat -e branches sleep 0 > > Performance counter stats for 'sleep 0': > > 166,739 branches > > 0.000832163 seconds time elapsed > > Based-on: https://lore.kernel.org/all/YvunKCJHSXKz%2FkZB@FVFF77S0Q05N > Based-on-patch-by: Mark Rutland > Signed-off-by: Stephane Eranian > Signed-off-by: Peter Newman Thanks for reworking the patch; the patch itself and commit message look good to me. I'd like to keep my S-o-b here for the code itself; could we please make the tags: Co-Developed-by: Stephane Eranian Signed-off-by: Stephane Eranian Co-Developed-by: Mark Rutland Signed-off-by: Mark Rutland Co-Developed-by: Peter Newman Signed-off-by: Peter Newman Link: https://lore.kernel.org/all/YvunKCJHSXKz%2FkZB@FVFF77S0Q05N That follow the conventions documented in: https://www.kernel.org/doc/html/latest/process/submitting-patches.html Thanks, Mark. > --- > v3->v4: > - splice Mark's patch with Stephane's problem statement > v2->v3: > - removed prints per Will's suggestion > > [v3] https://lore.kernel.org/all/20220816130221.885920-1-peternewman@google.com/ > [v2] https://lore.kernel.org/lkml/20220324181458.3216262-1-eranian@google.com/ > > arch/arm64/kernel/perf_event.c | 27 +++++++++++++++++++++++---- > 1 file changed, 23 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index dde06c0f97f3..ee63f8e719ea 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -45,7 +45,6 @@ static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { > [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INST_RETIRED, > [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1D_CACHE, > [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL, > - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED, > [PERF_COUNT_HW_BRANCH_MISSES] = ARMV8_PMUV3_PERFCTR_BR_MIS_PRED, > [PERF_COUNT_HW_BUS_CYCLES] = ARMV8_PMUV3_PERFCTR_BUS_CYCLES, > [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV8_PMUV3_PERFCTR_STALL_FRONTEND, > @@ -1048,6 +1047,28 @@ static void armv8pmu_reset(void *info) > armv8pmu_pmcr_write(pmcr); > } > > +static int __armv8_pmuv3_map_event_id(struct arm_pmu *armpmu, > + struct perf_event *event) > +{ > + if (event->attr.type == PERF_TYPE_HARDWARE && > + event->attr.config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS) { > + > + if (test_bit(ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED, > + armpmu->pmceid_bitmap)) > + return ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED; > + > + if (test_bit(ARMV8_PMUV3_PERFCTR_BR_RETIRED, > + armpmu->pmceid_bitmap)) > + return ARMV8_PMUV3_PERFCTR_BR_RETIRED; > + > + return HW_OP_UNSUPPORTED; > + } > + > + return armpmu_map_event(event, &armv8_pmuv3_perf_map, > + &armv8_pmuv3_perf_cache_map, > + ARMV8_PMU_EVTYPE_EVENT); > +} > + > static int __armv8_pmuv3_map_event(struct perf_event *event, > const unsigned (*extra_event_map) > [PERF_COUNT_HW_MAX], > @@ -1059,9 +1080,7 @@ static int __armv8_pmuv3_map_event(struct perf_event *event, > int hw_event_id; > struct arm_pmu *armpmu = to_arm_pmu(event->pmu); > > - hw_event_id = armpmu_map_event(event, &armv8_pmuv3_perf_map, > - &armv8_pmuv3_perf_cache_map, > - ARMV8_PMU_EVTYPE_EVENT); > + hw_event_id = __armv8_pmuv3_map_event_id(armpmu, event); > > /* > * CHAIN events only work when paired with an adjacent counter, and it > -- > 2.40.0.348.gf938b09366-goog > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel