From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 955A4C77B76 for ; Mon, 17 Apr 2023 15:36:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GYfO0nhAD4diFEuKYymnHxg19MnshWgQiTGhf8u1lD8=; b=an7Oghc83P3srK AiSV06eHx/81FjuexcmAq0GhiB9xQFrwUglGkgH/ow5GVkvT+cG71TyShJJaN7/3TL5gGsrUecZMC +xsI/msmK9l4SBHr8aUHT2KoDZ3Tktb5E2qX5DryYO9eT2CFsqrrAiu44payYuP10Wn8lOFjdrOmr ZRN+PXb5bSdmUBGo7mm82+o+rBUbxiiolt9tUUCjkjPMcakpuxJhTvy1sSos86nz8MAa1LF4JCnfX giRdmWIxwAj2DmK29mq1tNlxBEmfprSgVDJHM753og9AJNW/FOt/Dp/qUg91U7SGWzaWE7jp/bZeK ckaMW6bMZkSu8pZoO6Vg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1poQtS-00GuZJ-0C; Mon, 17 Apr 2023 15:35:50 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1poQtN-00GuXY-32 for linux-arm-kernel@lists.infradead.org; Mon, 17 Apr 2023 15:35:47 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B531A1692; Mon, 17 Apr 2023 08:36:25 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.19.253]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 85D783F6C4; Mon, 17 Apr 2023 08:35:40 -0700 (PDT) Date: Mon, 17 Apr 2023 16:35:12 +0100 From: Mark Rutland To: Robin Murphy Cc: "Ivan T. Ivanov" , Catalin Marinas , Will Deacon , Mark Brown , Shawn Guo , Dong Aisheng , linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com Subject: Re: [PATCH] arm64: errata: Add NXP iMX8QM workaround for A53 Cache coherency issue Message-ID: References: <20230412125506.21634-1-iivanov@suse.de> <8890bcc1-b881-e418-40a5-1b5d6cc8757e@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <8890bcc1-b881-e418-40a5-1b5d6cc8757e@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230417_083546_043415_D0626AA6 X-CRM114-Status: GOOD ( 18.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Apr 14, 2023 at 12:36:53PM +0100, Robin Murphy wrote: > On 2023-04-13 12:19, Mark Rutland wrote: > [...] > > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > > > index 6bf013fb110d..1ed648f7f29a 100644 > > > --- a/arch/arm64/include/asm/cpufeature.h > > > +++ b/arch/arm64/include/asm/cpufeature.h > > > @@ -835,7 +835,8 @@ static inline bool system_supports_bti(void) > > > static inline bool system_supports_tlb_range(void) > > > { > > > return IS_ENABLED(CONFIG_ARM64_TLB_RANGE) && > > > - cpus_have_const_cap(ARM64_HAS_TLB_RANGE); > > > + cpus_have_const_cap(ARM64_HAS_TLB_RANGE) && > > > + !cpus_have_const_cap(ARM64_WORKAROUND_NXP_ERR050104); > > > } > > > > It'd be better to handle this in the detection of ARM64_HAS_TLB_RANGE, as we > > have for CNP where has_useable_cnp() checks for ARM64_WORKAROUND_NVIDIA_CARMEL_CNP. > > It's not needed in either place, since neither Cortex-A53 or Cortex-A72 > support FEAT_TLBIRANGE, so this could never be true on affected platforms > anyway. Ah, even better -- we can just drop it. > Tangentially, I understand this platform has an SMMU[1], so I'd say it would > also be worth checking what SMMU_IDR0.BTM reports. With any luck it might be > 0, but if it's 1 then strictly it would want to be overridden as part of a > complete workaround as well. That wouldn't be a practical issue right now, > not least since the current Linux driver doesn't even use BTM, but it's > something which could need to be borne in mind in future. Absolutely. Mark. > > Robin. > > [1] https://lore.kernel.org/linux-arm-kernel/20210807104517.24066-1-peng.fan@oss.nxp.com/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel