From: Abel Vesa <abel.vesa@linaro.org>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: abelvesa@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Jacky Bai <ping.bai@nxp.com>,
Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH 3/5] clk: imx: imx8ulp: keep MU0_B clock enabled always
Date: Sun, 9 Apr 2023 17:09:54 +0300 [thread overview]
Message-ID: <ZDLHMgq3fPKIeSna@linaro.org> (raw)
In-Reply-To: <20230331063814.2462059-4-peng.fan@oss.nxp.com>
On 23-03-31 14:38:12, Peng Fan (OSS) wrote:
> From: Jacky Bai <ping.bai@nxp.com>
>
> Keep the A35<->M33 MU0_B clock enabled always for low power
> communication.
>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> drivers/clk/imx/clk-imx8ulp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8ulp.c b/drivers/clk/imx/clk-imx8ulp.c
> index 3cf4b094dfff..0dd48e8159ee 100644
> --- a/drivers/clk/imx/clk-imx8ulp.c
> +++ b/drivers/clk/imx/clk-imx8ulp.c
> @@ -376,7 +376,7 @@ static int imx8ulp_clk_pcc3_init(struct platform_device *pdev)
> clks[IMX8ULP_CLK_DMA1_CH29] = imx_clk_hw_gate("pcc_dma1_ch29", "xbar_ad_divplat", base + 0x7c, 30);
> clks[IMX8ULP_CLK_DMA1_CH30] = imx_clk_hw_gate("pcc_dma1_ch30", "xbar_ad_divplat", base + 0x80, 30);
> clks[IMX8ULP_CLK_DMA1_CH31] = imx_clk_hw_gate("pcc_dma1_ch31", "xbar_ad_divplat", base + 0x84, 30);
> - clks[IMX8ULP_CLK_MU0_B] = imx_clk_hw_gate("mu0_b", "xbar_ad_divplat", base + 0x88, 30);
> + clks[IMX8ULP_CLK_MU0_B] = imx_clk_hw_gate_flags("mu0_b", "xbar_ad_divplat", base + 0x88, 30, CLK_IS_CRITICAL);
> clks[IMX8ULP_CLK_MU3_A] = imx_clk_hw_gate("mu3_a", "xbar_ad_divplat", base + 0x8c, 30);
>
> imx_check_clk_hws(clks, clk_data->num);
> --
> 2.37.1
>
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next prev parent reply other threads:[~2023-04-09 14:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-31 6:38 [PATCH 0/5] clk: imx: imx8ulp: clk fix and update Peng Fan (OSS)
2023-03-31 6:38 ` [PATCH 1/5] clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents Peng Fan (OSS)
2023-04-09 14:09 ` Abel Vesa
2023-03-31 6:38 ` [PATCH 2/5] clk: imx: imx8ulp: Add divider closest support to get more accurate clock rate Peng Fan (OSS)
2023-04-09 14:09 ` Abel Vesa
2023-03-31 6:38 ` [PATCH 3/5] clk: imx: imx8ulp: keep MU0_B clock enabled always Peng Fan (OSS)
2023-04-09 14:09 ` Abel Vesa [this message]
2023-03-31 6:38 ` [PATCH 4/5] clk: imx: imx8ulp: Add tpm5 clock as critical gate clock Peng Fan (OSS)
2023-04-09 14:10 ` Abel Vesa
2023-03-31 6:38 ` [PATCH 5/5] clk: imx: imx8ulp: update clk flag for system critical clock Peng Fan (OSS)
2023-04-09 14:09 ` Abel Vesa
2023-04-09 14:23 ` [PATCH 0/5] clk: imx: imx8ulp: clk fix and update Abel Vesa
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