From: Jiri Pirko <jiri@resnulli.us>
To: Jakub Kicinski <kuba@kernel.org>
Cc: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@intel.com>,
Vadim Fedorenko <vadim.fedorenko@linux.dev>,
Vadim Fedorenko <vadfed@meta.com>,
Jonathan Lemon <jonathan.lemon@gmail.com>,
Paolo Abeni <pabeni@redhat.com>, poros <poros@redhat.com>,
mschmidt <mschmidt@redhat.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
linux-arm-kernel@lists.infradead.org,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"Olech, Milena" <milena.olech@intel.com>,
"Michalik, Michal" <michal.michalik@intel.com>
Subject: Re: [PATCH RFC v6 2/6] dpll: Add DPLL framework base functions
Date: Thu, 4 May 2023 19:51:38 +0200 [thread overview]
Message-ID: <ZFPwqu5W8NE6Luvk@nanopsycho> (raw)
In-Reply-To: <20230504090401.597a7a61@kernel.org>
Thu, May 04, 2023 at 06:04:01PM CEST, kuba@kernel.org wrote:
>On Thu, 4 May 2023 13:00:42 +0200 Jiri Pirko wrote:
>> Thu, May 04, 2023 at 04:16:43AM CEST, kuba@kernel.org wrote:
>> >On Wed, 3 May 2023 09:56:57 +0200 Jiri Pirko wrote:
>> >> Okay.
>> >>
>> >> When netdev will have pin ID in the RT netlink message (as it is done
>> >> in RFCv7), it is easy to get the pin/dpll for netdev. No problem there.
>> >>
>> >> However, for non-SyncE usecase, how do you imagine scripts to work?
>> >> I mean, the script have to obtain dpll/pin ID by deterministic
>> >> module_name/clock_id/idx tuple.
>> >
>> >No scoped idx.
>>
>> That means, no index defined by a driver if I undestand you correctly,
>> right?
>
>Yes, my suggestion did not include a scoped index with no
>globally defined semantics.
Okay, makes sense. Devlink port index didn't end up well :/
>
>> >> There are 2 options to do that:
>> >> 1) dump all dplls/pins and do lookup in userspace
>> >> 2) get a dpll/pin according to given module_name/clock_id/idx tuple
>> >>
>> >> The first approach is not very nice.
>> >> The currently pushed RFCv7 of the patchset does not support 2)
>> >>
>> >> Now if we add support for 2), we basically use module_name/clock_id/idx
>> >> as a handle for "get cmd". My point is, why can't we use it for "set
>> >> cmd" as well and avoid the ID entirely?
>> >
>> >Sure, we don't _have_ to have an ID, but it seems go against normal
>> >data normalization rules. And I don't see any harm in it.
>> >
>> >But you're asking for per-device "idx" and that's a no-go for me,
>> >given already cited experience.
>> >
>> >The user space can look up the ID based on identifying information it
>> >has. IMO it's better to support multiple different intelligible elements
>>
>> Do you mean fixed tuple or variable tuple?
>>
>> CMD_GET_ID
>> -> DPLL_A_MODULE_NAME
>> DPLL_A_CLOCK_ID
>
>> What is the next intelligible element to identify DPLL device here?
>
>I don't know. We can always add more as needed.
>We presuppose that the devices are identifiable, so whatever info
>is used to identify them goes here.
Allright. So in case of ptp_ocp and mlx5, module_name and clock_id
are enough. In case of ice, DPLL_A_TYPE, attr is the one to make
distinction between the 2 dpll instances there
So for now, we can have:
CMD_GET_ID
-> DPLL_A_MODULE_NAME
DPLL_A_CLOCK_ID
DPLL_A_TYPE
<- DPLL_A_ID
if user passes a subset which would not provide a single match, we error
out with -EINVAL and proper exack message. Makes sense?
>
>> <- DPLL_A_ID
>>
>> CMD_GET_PIN_ID
>> -> DPLL_A_MODULE_NAME
>> DPLL_A_CLOCK_ID
>
>> What is the next intelligible element to identify a pin here?
>
>Same answer. Could be a name of the pin according to ASIC docs.
>Could be the ball name for a BGA package. Anything that's meaningful.
Okay, for pin, the type and label would probably do:
CMD_GET_PIN_ID
-> DPLL_A_MODULE_NAME
DPLL_A_CLOCK_ID
DPLL_A_PIN_TYPE
DPLL_A_PIN_LABEL
<- DPLL_A_PIN_ID
Again, if user passes a subset which would not provide a single match,
we error out with -EINVAL and proper exack message.
If there is only one pin for example, user query of DPLL_A_MODULE_NAME
and DPLL_A_CLOCK_ID would do return a single match. No need to pass
anything else.
I think this could work with both ice and ptp_ocp, correct guys?
For mlx5, I will have 2 or more pins with same module name, clock id
and type. For these SyncE pins the label does not really make sense.
But I don't have to query, because the PIN_ID is going to be exposed for
netdev over RT netlink. Clicks.
Makes sense?
>
>My point is that we don't want a field simply called "index". Because
>then for one vendor it will mean Ethernet port, for another SMA
>connector number and for the third pin of the package. Those are
>different attributes.
Got you and agree.
>
>> <- DPLL_A_PIN_ID
>>
>> >than single integer index into which drivers will start encoding all
>> >sort of info, using locally invented schemes.
>>
>> There could be multiple DPLL and pin instances for a single
>> module/clock_id tuple we have to distinguish somehow. If the driver
>> can't pass "index" of DPLL or a pin, how we distinguish them?
>>
>> Plus is is possible that 2 driver instances share the same dpll
>> instance, then to get the dpll pointer reference, they do:
>> INSTANCE A:
>> dpll_0 = dpll_device_get(clock_id, 0, THIS_MODULE);
>> dpll_1 = dpll_device_get(clock_id, 1, THIS_MODULE);
>>
>> INSTANCE B:
>> dpll_0 = dpll_device_get(clock_id, 0, THIS_MODULE);
>> dpll_1 = dpll_device_get(clock_id, 1, THIS_MODULE);
>>
>> My point is, event if we don't expose the index to the userspace,
>> we need to have it internally.
>
>That's fine, I guess. I'd prefer driver matching to be the same as user
>space matching to force driver authors to have the same perspective as
>the user. But a "driver coookie" not visible to user space it probably
>fine.
Allright, lets leave them for now. As internal kernel API, could be
changed in the future if needed.
Arkadiusz, Vadim, are you following this?
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next prev parent reply other threads:[~2023-05-04 17:52 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-12 2:28 [PATCH RFC v6 0/6] Create common DPLL/clock configuration API Vadim Fedorenko
2023-03-12 2:28 ` [PATCH RFC v6 1/6] dpll: spec: Add Netlink spec in YAML Vadim Fedorenko
2023-03-14 14:44 ` Jiri Pirko
2023-03-16 13:15 ` Kubalewski, Arkadiusz
2023-03-16 13:45 ` Jiri Pirko
2023-03-16 15:19 ` Jiri Pirko
2023-03-17 0:53 ` Kubalewski, Arkadiusz
2023-03-17 10:07 ` Jiri Pirko
2023-03-17 0:52 ` Kubalewski, Arkadiusz
2023-03-17 10:05 ` Jiri Pirko
2023-03-17 14:29 ` Jiri Pirko
2023-03-17 15:14 ` Kubalewski, Arkadiusz
2023-03-17 16:20 ` Jiri Pirko
2023-03-17 18:22 ` Kubalewski, Arkadiusz
2023-03-20 8:10 ` Jiri Pirko
2023-03-21 4:05 ` Jakub Kicinski
2023-03-21 4:13 ` Jakub Kicinski
2023-03-21 4:20 ` Jakub Kicinski
2023-03-17 16:23 ` Jiri Pirko
2023-03-21 4:00 ` Jakub Kicinski
2023-03-17 16:53 ` Jiri Pirko
2023-03-17 18:50 ` Kubalewski, Arkadiusz
2023-03-12 2:28 ` [PATCH RFC v6 2/6] dpll: Add DPLL framework base functions Vadim Fedorenko
2023-03-13 16:21 ` Jiri Pirko
2023-03-13 22:59 ` Vadim Fedorenko
2023-03-14 16:43 ` Kubalewski, Arkadiusz
2023-03-15 12:14 ` Jiri Pirko
[not found] ` <ZBA8ofFfKigqZ6M7@nanopsycho>
2023-03-14 17:50 ` Kubalewski, Arkadiusz
2023-03-15 9:22 ` Jiri Pirko
2023-03-16 12:31 ` Jiri Pirko
2023-03-28 15:22 ` Vadim Fedorenko
2023-04-01 12:49 ` Jiri Pirko
2023-04-03 18:18 ` Jakub Kicinski
2023-04-09 7:51 ` Jiri Pirko
[not found] ` <20230410153149.602c6bad@kernel.org>
2023-04-16 16:23 ` Jiri Pirko
2023-04-17 15:53 ` Vadim Fedorenko
[not found] ` <20230417124942.4305abfa@kernel.org>
2023-04-27 8:05 ` Paolo Abeni
2023-04-27 10:20 ` Vadim Fedorenko
[not found] ` <ZFDPaXlJainSOqmV@nanopsycho>
[not found] ` <20230502083244.19543d26@kernel.org>
2023-05-03 7:56 ` Jiri Pirko
2023-05-04 2:16 ` Jakub Kicinski
2023-05-04 11:00 ` Jiri Pirko
2023-05-04 11:14 ` Jiri Pirko
2023-05-04 16:04 ` Jakub Kicinski
2023-05-04 17:51 ` Jiri Pirko [this message]
2023-05-04 18:44 ` Jakub Kicinski
2023-05-05 10:41 ` Jiri Pirko
2023-05-05 15:35 ` Jakub Kicinski
2023-05-07 7:58 ` Jiri Pirko
2023-03-14 15:45 ` Jiri Pirko
2023-03-14 18:35 ` Kubalewski, Arkadiusz
2023-03-15 14:43 ` Jiri Pirko
2023-03-15 15:29 ` Jiri Pirko
2023-03-16 12:20 ` Jiri Pirko
2023-03-16 12:37 ` Jiri Pirko
2023-03-16 13:53 ` Jiri Pirko
2023-03-16 16:16 ` Jiri Pirko
2023-03-17 16:21 ` Jiri Pirko
2023-03-20 10:24 ` Jiri Pirko
2023-03-21 13:34 ` Jiri Pirko
2023-03-23 11:18 ` Jiri Pirko
2023-03-24 9:29 ` Jiri Pirko
2023-03-12 2:28 ` [PATCH RFC v6 3/6] dpll: documentation on DPLL subsystem interface Vadim Fedorenko
2023-03-14 16:14 ` Jiri Pirko
2023-04-03 10:21 ` Kubalewski, Arkadiusz
2023-03-16 13:46 ` Jiri Pirko
2023-04-03 10:23 ` Kubalewski, Arkadiusz
2023-03-12 2:28 ` [PATCH RFC v6 4/6] ice: add admin commands to access cgu configuration Vadim Fedorenko
2023-03-12 2:28 ` [PATCH RFC v6 5/6] ice: implement dpll interface to control cgu Vadim Fedorenko
2023-03-12 2:28 ` [PATCH RFC v6 6/6] ptp_ocp: implement DPLL ops Vadim Fedorenko
[not found] ` <ZBBG2xRhLOIPMD0+@nanopsycho>
2023-03-15 0:10 ` Vadim Fedorenko
2023-03-15 12:24 ` Jiri Pirko
2023-03-31 23:28 ` Vadim Fedorenko
2023-04-01 12:53 ` Jiri Pirko
2023-03-15 15:34 ` Jiri Pirko
2023-03-15 15:52 ` Vadim Fedorenko
2023-03-16 12:12 ` Jiri Pirko
2023-03-13 12:20 ` [PATCH RFC v6 0/6] Create common DPLL/clock configuration API Jiri Pirko
2023-03-13 15:33 ` Vadim Fedorenko
2023-03-13 16:22 ` Jiri Pirko
2023-03-13 16:31 ` Vadim Fedorenko
2023-03-17 16:10 ` Jiri Pirko
2023-03-18 5:01 ` Jakub Kicinski
2023-03-23 11:21 ` Jiri Pirko
2023-03-23 18:00 ` Vadim Fedorenko
2023-03-26 17:00 ` [patch dpll-rfc 0/7] dpll: initial patchset extension by mlx5 implementation Jiri Pirko
2023-03-26 17:00 ` [patch dpll-rfc 1/7] dpll: make ops function args const Jiri Pirko
2023-03-26 17:00 ` [patch dpll-rfc 2/7] dpll: allow to call device register multiple times Jiri Pirko
2023-03-26 17:00 ` [patch dpll-rfc 3/7] dpll: introduce a helper to get first dpll ref and use it Jiri Pirko
2023-03-26 17:00 ` [patch dpll-rfc 4/7] dpll: allow to call pin register multiple times Jiri Pirko
2023-03-26 17:00 ` [patch dpll-rfc 5/7] dpll: export dpll_pin_notify() Jiri Pirko
2023-03-26 17:00 ` [patch dpll-rfc 6/7] netdev: expose DPLL pin handle for netdevice Jiri Pirko
2023-03-26 17:00 ` [patch dpll-rfc 7/7] mlx5: Implement SyncE support using DPLL infrastructure Jiri Pirko
2023-03-28 16:36 ` [patch dpll-rfc 0/7] dpll: initial patchset extension by mlx5 implementation Vadim Fedorenko
2023-04-01 12:54 ` Jiri Pirko
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