From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBC39C77B7F for ; Tue, 16 May 2023 09:48:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IwiuaaXYjuuSFDJ2TW+NwwhZP8QRFWngVvts++fV8hE=; b=wwVYn939LdDNOY sII4kDzWu/qJLWiiyok74G3Hc4wNeTZG7JYixrJt6F0m6ue1i/WFGKDXRSuWVQkqfMIM9LFGjQ/rI YNWE0JWtz9r+2AaWYuF8LvwI9cQEqu0vB3B1y1kJIsiI50SKq3SgShgMLpdVTIyC8pQgrGDABfjFS RnF/Jskhu0Udig7OhRyStw3iMuLkvSr6b3XC5EhIBAvzyx5pzqVZA1oQ8RtR9EQs+9i6U46iOiu8m +cEWtoKs3maRShjvxp8Mwd1TZuWvoOub+DY6SzAyLpjI6d3m2XXxYIQ1wvVS9sU8VpaN/daCsBELx mtSI7Tk497CIyUZY+zuw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pyrIF-00589r-1w; Tue, 16 May 2023 09:48:31 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pyrID-00588n-2N for linux-arm-kernel@lists.infradead.org; Tue, 16 May 2023 09:48:31 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1684230508; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=vWt1WnrL78KN76t18wgcQ0hzm5J2w3bN/iAJ4QOvahM=; b=B7rEFshugMQtlWlTmTll8Hw2BQuNE/1kcsubM7LzL91f9mrnHoX1kLhHNTQkVtVhQ3mJq7 aEFz0ZTO5wt+By4GayjIQibj6CpevgJlsZM2WUeYK9GXix5nwBMql6VsrfveGnhrJZ2w5p JOiZkPxk9oIxBQ/M6391bnimKsX1bGo= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-416-SPEsVo6ZNMO79NSXPEvafA-1; Tue, 16 May 2023 05:48:22 -0400 X-MC-Unique: SPEsVo6ZNMO79NSXPEvafA-1 Received: from smtp.corp.redhat.com (int-mx10.intmail.prod.int.rdu2.redhat.com [10.11.54.10]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 173FC84AF32; Tue, 16 May 2023 09:48:22 +0000 (UTC) Received: from localhost (ovpn-13-34.pek2.redhat.com [10.72.13.34]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5D488400F5A; Tue, 16 May 2023 09:48:21 +0000 (UTC) Date: Tue, 16 May 2023 17:48:18 +0800 From: Baoquan He To: Thomas Gleixner Cc: Uladzislau Rezki , Andrew Morton , linux-mm@kvack.org, Christoph Hellwig , Lorenzo Stoakes , Peter Zijlstra , John Ogness , linux-arm-kernel@lists.infradead.org, Russell King , Mark Rutland , Marc Zyngier Subject: Re: Excessive TLB flush ranges Message-ID: References: <87a5y5a6kj.ffs@tglx> <87o7mk93tc.ffs@tglx> <878rdo8xn2.ffs@tglx> MIME-Version: 1.0 In-Reply-To: <878rdo8xn2.ffs@tglx> X-Scanned-By: MIMEDefang 3.1 on 10.11.54.10 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230516_024829_844792_E47B30E4 X-CRM114-Status: GOOD ( 31.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 05/16/23 at 10:54am, Thomas Gleixner wrote: > On Tue, May 16 2023 at 16:07, Baoquan He wrote: > > On 05/16/23 at 08:40am, Thomas Gleixner wrote: > >> On Tue, May 16 2023 at 10:26, Baoquan He wrote: > >> > On 05/15/23 at 08:17pm, Uladzislau Rezki wrote: > >> >> For systems which lack a full TLB flush and to flush a long range is > >> >> a problem(it takes time), probably we can flush VA one by one. Because > >> >> currently we calculate a flush range [min:max] and that range includes > >> >> the space that might not be mapped at all. Like below: > >> > > >> > It's fine if we only calculate a flush range of [min:max] with VA. In > >> > vm_reset_perms(), it calculates the flush range with the impacted direct > >> > mapping range, then merge it with VA's range. That looks really strange > >> > and surprising. If the vm->pages[] are got from a lower part of physical > >> > memory, the final merged flush will span tremendous range. Wondering why > >> > we need merge the direct map range with VA range, then do flush. Not > >> > sure if I misunderstand it. > >> > >> So what happens on this BPF teardown is: > >> > >> The vfree(8k) ends up flushing 3 entries. The actual vmalloc part (2) and > >> one extra which is in the direct map. I haven't verified that yet, but I > >> assume it's the alias of one of the vmalloc'ed pages. > > > > It looks like the reason. As Uladzislau pointed out, ARCH-es may > > have full TLB flush, so won't get trouble from the merged flush > > in the calculated [min:max] way, e.g arm64 and x86's flush_tlb_kernel_range(). > > However, arm32 seems lacking the ability of full TLB flash. > > ARM has a full flush, but it does not check for that in > flush_tlb_kernel_range(). > > > If agreed, I can make a draft patch to do the flush for direct map and > > VA seperately, see if it works. > > Of course it works. Already done that. > > But you are missing the point. Look at the examples I provided. > > The current implementation ends up doing a full flush on x86 just to > flush 3 TLB entries. For the very same reason because the flush range > (start..end) becomes insanely large due to the direct map and vmalloc > parts. > > But doing indivudual flushes for direct map and vmalloc space is silly > too because then it ends up doing two IPIs instead of one. IPIs are > expensive and the whole point of coalescing the flushes is to spare > IPIs, no? > > So with my hacked up flush_tlb_kernel_vas() I end up having exactly > _one_ IPI which walks the list and flushes the 3 TLB entries. Makes sense, thanks for telling. While your handling about alias_va may not be right. I will add inline comment in your patch, please check there. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel