From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44E4BC7EE24 for ; Tue, 6 Jun 2023 10:41:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jkcqqNo46BDbLKmf19ynQRoZSuGQ/3PhgQzith7QCI0=; b=C4Uj0hXM+EA55B KWF8PYZD168hNIdtR0dOP154O/lKAZjhJE/GD2p6Xca9TJO5sL3oo9rwGF+H5k6OpZqz4Zy/ssAzX IYT66XSq64vPf+9oN23G+T8/3SCWcOZskQgLSv1vahHUVHjArif94WmSdloJaCqcK6hG+DCg2EKhc Q9I2ZqX1wQasxm9ASqtM3vCUzeRPSLkSti+grM42nTYRWqDRR9lDDB46L83Xqx7HNDm3xl8J9jnpB kRHja+/7bmMHzrYdWWU2jP4WqcDUfL86Tufw1aTmAmzMJVg08ui2qSNdE+QLgZxys5gTXFDfqo91M TobXoQI5zQa+g7Vk5eMQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q6U84-001HzR-28; Tue, 06 Jun 2023 10:41:32 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q6U81-001HvC-1V for linux-arm-kernel@lists.infradead.org; Tue, 06 Jun 2023 10:41:31 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E68562F4; Tue, 6 Jun 2023 03:42:09 -0700 (PDT) Received: from FVFF77S0Q05N.cambridge.arm.com (FVFF77S0Q05N.cambridge.arm.com [10.1.28.175]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 95E553F587; Tue, 6 Jun 2023 03:41:22 -0700 (PDT) Date: Tue, 6 Jun 2023 11:41:17 +0100 From: Mark Rutland To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will@kernel.org, catalin.marinas@arm.com, Mark Brown , James Clark , Rob Herring , Marc Zyngier , Suzuki Poulose , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-perf-users@vger.kernel.org Subject: Re: [PATCH V11 05/10] arm64/perf: Add branch stack support in ARMV8 PMU Message-ID: References: <20230531040428.501523-1-anshuman.khandual@arm.com> <20230531040428.501523-6-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230606_034129_556414_FE8A782B X-CRM114-Status: GOOD ( 26.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 06, 2023 at 04:04:25PM +0530, Anshuman Khandual wrote: > On 6/5/23 17:35, Mark Rutland wrote: > > On Wed, May 31, 2023 at 09:34:23AM +0530, Anshuman Khandual wrote: > >> static int armv8pmu_probe_pmu(struct arm_pmu *cpu_pmu) > >> @@ -1145,12 +1162,24 @@ static int armv8pmu_probe_pmu(struct arm_pmu *cpu_pmu) > >> }; > >> int ret; > >> > >> + ret = armv8pmu_private_alloc(cpu_pmu); > >> + if (ret) > >> + return ret; > >> + > >> ret = smp_call_function_any(&cpu_pmu->supported_cpus, > >> __armv8pmu_probe_pmu, > >> &probe, 1); > >> if (ret) > >> return ret; > >> > >> + if (arm_pmu_branch_stack_supported(cpu_pmu)) { > >> + ret = branch_records_alloc(cpu_pmu); > >> + if (ret) > >> + return ret; > >> + } else { > >> + armv8pmu_private_free(cpu_pmu); > >> + } > > > > I see from the next patch that "private" is four ints, so please just add that > > to struct arm_pmu under an ifdef CONFIG_ARM64_BRBE. That'll simplify this, and > > if we end up needing more space in future we can consider factoring it out. > > struct arm_pmu { > ........................................ > /* Implementation specific attributes */ > void *private; > } > > private pointer here creates an abstraction for given pmu implementation > to hide attribute details without making it known to core arm pmu layer. > Although adding ifdef CONFIG_ARM64_BRBE solves the problem as mentioned > above, it does break that abstraction. Currently arm_pmu layer is aware > about 'branch records' but not about BRBE in particular which the driver > adds later on. I suggest we should not break that abstraction. I understand the rationale, but I think it's simpler for now to break that abstraction. We can always refactor it later. > Instead a global 'static struct brbe_hw_attr' in drivers/perf/arm_brbe.c > can be initialized into arm_pmu->private during armv8pmu_branch_probe(), > which will also solve the allocation-free problem. IIUC that's not going to work for big.LITTLE systems where the BRBE support varies, as we need this data per arm_pmu. > Also similar helpers armv8pmu_task_ctx_alloc()/free() could be defined to > manage task context cache i.e arm_pmu->pmu.task_ctx_cache independently. > > But now armv8pmu_task_ctx_alloc() can be called after pmu probe confirms > to have arm_pmu->has_branch_stack. I think those are different, and should be kept. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel