From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C225FC7EE24 for ; Tue, 6 Jun 2023 16:48:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TUBn/cLCwbzE+aSTdrwRKASCuC5H3dlMec003Z8FR8k=; b=IwBv0arqqejmPk 7Cu7Mmq+SS+2OVuARfRm81ChOcsnAh3fclKn/VCjm1lFWLX95Sk8Qc0MS6UbWPW2W2wqBe9Bhiyv2 b+ECAAaTmWigvyVRwh015Cjn/QxEPAl1VDECxYsAXqK2G4xRVtBYMsauDAw46bmEpzSNkzmUWdxVf PmMROz+kbcSnX/lj9odUTeyLe7CLWtJSpcvq71+F0wBnVMHMlZEb3o0M//lHlpL4Ng3J4TPfsKETr c1vn0huD+hzbGpjeZJAghng/sB0TeGYLTBg+jKiBxGny2czakhnMmHn8G3bSAgv62ke6OdNqtApAY fzfkYEISFt3oetPZ08vg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q6Zr8-002UJA-1s; Tue, 06 Jun 2023 16:48:26 +0000 Received: from out-33.mta1.migadu.com ([2001:41d0:203:375::21]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q6Zr5-002UHi-0j for linux-arm-kernel@lists.infradead.org; Tue, 06 Jun 2023 16:48:25 +0000 Date: Tue, 6 Jun 2023 16:48:14 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1686070098; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=DogLaWfzYy1/V+VaCUUG3NCZlKwH3PQn/dBKrg24mDs=; b=qySYn1IIF+xLlPjgV/vBzMH2Wd4dyYoD+7O6Ulz78Cvz1DL/rfaAfnyq8IZduFBE3Y6zfW hfcQNbdETzlTmXPnC7kBxNkKZVrLJgVVl31Z2Ahwz5KQUEI5Eq7oWT3r2zCxtNNGEyippn Vp6u3pWNgfnZV0UJqAeGZmOijWc+UBk= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Marc Zyngier Cc: Sebastian Ott , Sean Christopherson , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] KVM: arm64: Fix smp_processor_id() call in preemptible context Message-ID: References: <2f16f83e-ed60-fcb7-7f3d-0fa216c41cb9@redhat.com> <87pm68o99d.wl-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <87pm68o99d.wl-maz@kernel.org> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230606_094823_705036_9B0D8DBF X-CRM114-Status: GOOD ( 17.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 06, 2023 at 05:17:34PM +0100, Marc Zyngier wrote: > On Tue, 06 Jun 2023 15:10:44 +0100, Oliver Upton wrote: > > diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c > > index 491ca7eb2a4c..933a6331168b 100644 > > --- a/arch/arm64/kvm/pmu-emul.c > > +++ b/arch/arm64/kvm/pmu-emul.c > > @@ -700,7 +700,7 @@ static struct arm_pmu *kvm_pmu_probe_armpmu(void) > > > > mutex_lock(&arm_pmus_lock); > > > > - cpu = smp_processor_id(); > > + cpu = raw_smp_processor_id(); > > list_for_each_entry(entry, &arm_pmus, entry) { > > tmp = entry->arm_pmu; > > > > > > If preemption doesn't matter (and I really don't think it does), why > are we looking for a the current CPU? I'd rather we pick the PMU that > is associated with CPU0 (we're pretty sure it exists), and be done > with it. Getting the current CPU is still useful, we just don't care about that cpu# being stale. Unconditionally using CPU0 could break existing usage patterns. A not-too-contrived example would be to taskset QEMU onto a cluster of cores in a big.LITTLE system (I do this). The current behavior would assign the right PMU to the guest. I've made my opinions about the 'old' ABI quite clear, but I don't have too great of an appetite for breakage, though fragile. Can we proceed with the fix I had suggested along with a more complete description of the baggage that we're carrying? -- Thanks, Oliver _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel