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From: Oliver Upton To: Jing Zhang Cc: KVM , KVMARM , ARMLinux , Marc Zyngier , Oliver Upton , Will Deacon , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Fuad Tabba , Reiji Watanabe , Raghavendra Rao Ananta , Suraj Jitindar Singh Subject: Re: [PATCH v4 3/4] KVM: arm64: Enable writable for ID_AA64PFR0_EL1 Message-ID: References: <20230607194554.87359-1-jingzhangos@google.com> <20230607194554.87359-4-jingzhangos@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230607194554.87359-4-jingzhangos@google.com> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230626_094906_338789_28E2F709 X-CRM114-Status: GOOD ( 20.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jun 07, 2023 at 07:45:53PM +0000, Jing Zhang wrote: > Return an error if userspace tries to set SVE field of the register > to a value that conflicts with SVE configuration for the guest. > SIMD/FP/SVE fields of the requested value are validated according to > Arm ARM. > > Signed-off-by: Jing Zhang > --- > arch/arm64/kvm/sys_regs.c | 31 +++++++++++++++++++++++++++++-- > 1 file changed, 29 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 3964a85a89fe..8f3ad9c12b27 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1509,9 +1509,36 @@ static u64 read_sanitised_id_aa64pfr0_el1(struct kvm_vcpu *vcpu, > > val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AMU); > > + if (!system_supports_sve()) > + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_SVE); > + If the system doesn't support SVE, wouldn't the sanitised system-wide value hide the feature as well? A few lines up we already mask this field based on whether or not the vCPU has the feature, which is actually meaningful. > return val; > } > > +static int set_id_aa64pfr0_el1(struct kvm_vcpu *vcpu, > + const struct sys_reg_desc *rd, > + u64 val) > +{ > + int fp, simd; > + bool has_sve = id_aa64pfr0_sve(val); > + > + simd = cpuid_feature_extract_signed_field(val, ID_AA64PFR0_EL1_AdvSIMD_SHIFT); > + fp = cpuid_feature_extract_signed_field(val, ID_AA64PFR0_EL1_FP_SHIFT); > + /* AdvSIMD field must have the same value as FP field */ > + if (simd != fp) > + return -EINVAL; > + > + /* fp must be supported when sve is supported */ > + if (has_sve && (fp < 0)) > + return -EINVAL; > + > + /* Check if there is a conflict with a request via KVM_ARM_VCPU_INIT */ > + if (vcpu_has_sve(vcpu) ^ has_sve) > + return -EPERM; Same comment here on cross-field plumbing. -- Thanks, Oliver _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel