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From: Jason Gunthorpe <jgg@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: Nicolin Chen <nicolinc@nvidia.com>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	jean-philippe@linaro.org, baolu.lu@linux.intel.com,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master
Date: Fri, 14 Jul 2023 09:50:39 -0300	[thread overview]
Message-ID: <ZLFEn9/rc0WBNBfA@nvidia.com> (raw)
In-Reply-To: <CAKHBV240_0bUE-25sND3oSG57jT0yJiZzAt+fPTXehjm=zmRBw@mail.gmail.com>

On Fri, Jul 14, 2023 at 05:12:35PM +0800, Michael Shavit wrote:
> On Fri, Jul 14, 2023 at 9:14 AM Nicolin Chen <nicolinc@nvidia.com> wrote:
> > @Michael,
> > Would it be possible for you to update a v5, following Jason's
> > suggestion overall? And I think we can have a smaller refactor
> > series first without set_dev_pasid, to have a common codeline
> > sooner for us to add new features, such as set_dev_pasid, the
> > use case of IDENTITY default substream, and the nesting series.
> > I will help testing with some pasid/non-pasid use cases too.
> 
> Want to make sure I fully understand these last few messages first. At
> a high level, we want:
> 1. arm_smmu_master is allowed to own a CD table, but not an
> STE-precursor (s1_cfg/s2_cfg). The s1_cfg is practically already that,
> and we can probably get there with minimal changes.

Yah

> 2. arm_smmu_master shouldn't point to the currently active CD table
> (which may or may not be the one it owns) or STE-precursor as a
> shortcut. All code should figure it out by looking at the master's
> currently attached domain (functionality could be provided by
> helper).

I think that is close.

Most likely the master should have a pointer to an STE owning
iommu_domain. If that is !NULL then the master's CD table is not used
and the STE is computed from that iommu_domain. Essentially it says
that iommu_domain owns the entire RID.

Otherwise the STE comes from the master's CD table, and this means the
master is in SSID mode.

> 3. arm_smmu_domain shouldn't pre-generate any STE-precursors. The
> STE/CD for a domain should either be computed right when it is
> written, or computed ahead of time and stored as a copy in the
> smmu-domain.

I think this is cleaner since alot of the STE/CD calculation is either
constant or copying data from other places in the domain struct, but
maybe you'll find this is wrong. At least it is not super important at
this point.

Jason

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  parent reply	other threads:[~2023-07-14 12:51 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-21  6:37 [PATCH v4 00/13] Add PASID support to SMMUv3 unmanaged domains Michael Shavit
2023-06-21  6:37 ` [PATCH v4 01/13] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg Michael Shavit
2023-06-21  6:37 ` [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master Michael Shavit
2023-07-13  1:22   ` Nicolin Chen
2023-07-13  8:34     ` Michael Shavit
2023-07-13 14:29       ` Jason Gunthorpe
2023-07-13 16:16         ` Michael Shavit
2023-07-13 16:34           ` Michael Shavit
2023-07-13 16:41           ` Jason Gunthorpe
2023-07-13 19:54             ` Nicolin Chen
2023-07-13 23:48               ` Jason Gunthorpe
2023-07-14  1:14                 ` Nicolin Chen
2023-07-14  1:14                   ` Nicolin Chen
2023-07-14  9:12                   ` Michael Shavit
2023-07-14 11:58                     ` Will Deacon
2023-07-14 12:50                     ` Jason Gunthorpe [this message]
2023-07-14  8:02             ` Michael Shavit
2023-07-14 13:21               ` Jason Gunthorpe
2023-07-17 10:06                 ` Michael Shavit
2023-07-17 12:29                   ` Jason Gunthorpe
2023-07-18  8:56                     ` Michael Shavit
2023-07-27 11:22                       ` Michael Shavit
2023-07-27 11:54                         ` Jason Gunthorpe
2023-07-27 14:04                           ` Michael Shavit
2023-07-27 14:21                             ` Jason Gunthorpe
2023-06-21  6:37 ` [PATCH v4 03/13] iommu/arm-smmu-v3: Refactor write_strtab_ent Michael Shavit
2023-07-13  1:41   ` Nicolin Chen
2023-06-21  6:37 ` [PATCH v4 04/13] iommu/arm-smmu-v3: Refactor write_ctx_desc Michael Shavit
2023-06-21  6:37 ` [PATCH v4 05/13] iommu/arm-smmu-v3: Use the master-owned s1_cfg Michael Shavit
2023-07-13  1:57   ` Nicolin Chen
2023-07-13  4:25     ` Nicolin Chen
2023-06-21  6:37 ` [PATCH v4 06/13] iommu/arm-smmu-v3: Simplify arm_smmu_enable_ats Michael Shavit
2023-06-21  6:37 ` [PATCH v4 07/13] iommu/arm-smmu-v3: Keep track of attached ssids Michael Shavit
2023-07-13  2:09   ` Nicolin Chen
2023-07-21  6:48     ` Michael Shavit
2023-07-27  4:44       ` Nicolin Chen
2023-07-13  4:45   ` Nicolin Chen
2023-07-14  9:30     ` Michael Shavit
2023-07-15  0:35       ` Nicolin Chen
2023-07-15  0:35         ` Nicolin Chen
2023-07-18  8:51         ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 08/13] iommu/arm-smmu-v3: Add helper for atc invalidation Michael Shavit
2023-06-21  6:37 ` [PATCH v4 09/13] iommu/arm-smmu-v3: Implement set_dev_pasid Michael Shavit
2023-06-23  0:32   ` Nicolin Chen
2023-06-26  2:33     ` Michael Shavit
2023-06-26 18:14       ` Nicolin Chen
2023-06-28 13:36         ` Michael Shavit
2023-07-13  8:44   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 10/13] iommu/arm-smmu-v3-sva: Remove bond refcount Michael Shavit
2023-06-21  6:37 ` [PATCH v4 11/13] iommu/arm-smmu-v3-sva: Clean unused iommu_sva Michael Shavit
2023-06-21  6:37 ` [PATCH v4 12/13] iommu/arm-smmu-v3-sva: Remove arm_smmu_bond Michael Shavit
2023-07-13  8:41   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 13/13] iommu/arm-smmu-v3-sva: Add check when enabling sva Michael Shavit

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