From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24B2FC001DE for ; Fri, 28 Jul 2023 13:39:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4w2oTh7Uxal+pfG97bd8GBGGzKrqn1Z2WZbwTC/4BAE=; b=gupGmPTMl2XdDe Uri2pMM5kEimOfe4yua6TZwk5TEIrk7yW5fvISAf+qBzFUYVeUqnNMKYcayfXi23UZkWm3GG3oW4d 9CRdBEuDYlG4Kv0yl0YkzzDP6Sk0aTpVubtyJOBi2DPiQPl2jhz/fvG9Klzn3nSSNL26qujV8Vy/1 Iy761xyskxMZ9iXTuYM62PlPbeD6DzcJHdkO2BSwRvk3w9Lqib5mGNsTIhmiDB4KKulZUptw4ESAq rBPG9ElTJrM4E5K/xq+7OzQhUtIRC1ZFC9az3fzdnyFeyIDLWYnI8oQeGtzvTd/1i7qwDPilzAWGP q7KF1X3NLhqfGPZ0PADg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qPNgO-003YFl-36; Fri, 28 Jul 2023 13:39:04 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qPNgL-003YFI-2s for linux-arm-kernel@lists.infradead.org; Fri, 28 Jul 2023 13:39:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 24C842F4; Fri, 28 Jul 2023 06:39:42 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.89.82]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8B8DA3F5A1; Fri, 28 Jul 2023 06:38:57 -0700 (PDT) Date: Fri, 28 Jul 2023 14:38:54 +0100 From: Mark Rutland To: Xu Yang Cc: frank.li@nxp.com, will@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 3/3] perf/imx_ddr: don't enable counter0 if none of 4 counters are used Message-ID: References: <20230713103758.2627269-1-xu.yang_2@nxp.com> <20230713103758.2627269-3-xu.yang_2@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230713103758.2627269-3-xu.yang_2@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230728_063901_981137_73C5A3A8 X-CRM114-Status: GOOD ( 23.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 13, 2023 at 06:37:58PM +0800, Xu Yang wrote: > In current driver, counter0 will be enabled after ddr_perf_pmu_enable() > is called even though none of the 4 counters are used. This will cause > counter0 continue to count until ddr_perf_pmu_disabled() is called. If > pmu is not disabled all the time, the pmu interrupt will be asserted > from time to time due to counter0 will overflow and irq handler will > clear it. It's not an expected behavior. This patch will not enable > counter0 if none of 4 counters are used. > > Fixes: 9a66d36cc7ac ("drivers/perf: imx_ddr: Add DDR performance counter support to perf") > Signed-off-by: Xu Yang Acked-by: Mark Rutland I assume that you'll send this as part of a v3 given the comments on patches 1 and 2. Thanks, Mark. > > --- > Changes in v2: > - add active events count as suggested from Frank > --- > drivers/perf/fsl_imx8_ddr_perf.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c > index d65200d4e96e..761e45f21092 100644 > --- a/drivers/perf/fsl_imx8_ddr_perf.c > +++ b/drivers/perf/fsl_imx8_ddr_perf.c > @@ -103,6 +103,7 @@ struct ddr_pmu { > const struct fsl_ddr_devtype_data *devtype_data; > int irq; > int id; > + int active_count; > }; > > static ssize_t ddr_perf_identifier_show(struct device *dev, > @@ -516,6 +517,9 @@ static void ddr_perf_event_start(struct perf_event *event, int flags) > > ddr_perf_counter_enable(pmu, event->attr.config, counter, true); > > + if (counter != EVENT_CYCLES_COUNTER) > + pmu->active_count++; > + > hwc->state = 0; > } > > @@ -569,6 +573,9 @@ static void ddr_perf_event_stop(struct perf_event *event, int flags) > ddr_perf_counter_enable(pmu, event->attr.config, counter, false); > ddr_perf_event_update(event); > > + if (counter != EVENT_CYCLES_COUNTER) > + pmu->active_count--; > + > hwc->state |= PERF_HES_STOPPED; > } > > @@ -589,7 +596,8 @@ static void ddr_perf_pmu_enable(struct pmu *pmu) > struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu); > > /* enable cycle counter if cycle is not active event list */ > - if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL) > + if ((ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL) > + && ddr_pmu->active_count > 0) > ddr_perf_counter_enable(ddr_pmu, > EVENT_CYCLES_ID, > EVENT_CYCLES_COUNTER, > @@ -600,7 +608,8 @@ static void ddr_perf_pmu_disable(struct pmu *pmu) > { > struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu); > > - if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL) > + if ((ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL) > + && ddr_pmu->active_count > 0) > ddr_perf_counter_enable(ddr_pmu, > EVENT_CYCLES_ID, > EVENT_CYCLES_COUNTER, > -- > 2.34.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel